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Merge tag 'drm-misc-next-2020-09-21' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
drm-misc-next for 5.10: UAPI Changes: Cross-subsystem Changes: - virtio: Merged a PR for patches that will affect drm/virtio Core Changes: - dev: More devm_drm convertions and removal of drm_dev_init - atomic: Split out drm_atomic_helper_calc_timestamping_constants of drm_atomic_helper_update_legacy_modeset_state - ttm: More rework Driver Changes: - i915: selftests improvements - panfrost: support for Amlogic SoC - vc4: one fix - tree-wide: conversions to devm_drm_dev_alloc, - ast: simplifications of the atomic modesetting code - panfrost: multiple fixes - vc4: multiple fixes Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <maxime@cerno.tech> Link: https://patchwork.freedesktop.org/patch/msgid/20200921152956.2gxnsdgxmwhvjyut@gilmour.lan
2 parents fc88fef + 089d834 commit 6ea6be7

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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/brcm,bcm2711-hdmi.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Broadcom BCM2711 HDMI Controller Device Tree Bindings
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maintainers:
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- Eric Anholt <eric@anholt.net>
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properties:
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compatible:
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enum:
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- brcm,bcm2711-hdmi0
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- brcm,bcm2711-hdmi1
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reg:
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items:
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- description: HDMI controller register range
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- description: DVP register range
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- description: HDMI PHY register range
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- description: Rate Manager register range
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- description: Packet RAM register range
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- description: Metadata RAM register range
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- description: CSC register range
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- description: CEC register range
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- description: HD register range
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reg-names:
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items:
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- const: hdmi
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- const: dvp
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- const: phy
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- const: rm
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- const: packet
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- const: metadata
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- const: csc
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- const: cec
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- const: hd
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clocks:
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items:
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- description: The HDMI state machine clock
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- description: The Pixel BVB clock
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- description: The HDMI Audio parent clock
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- description: The HDMI CEC parent clock
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clock-names:
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items:
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- const: hdmi
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- const: bvb
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- const: audio
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- const: cec
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ddc:
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allOf:
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- $ref: /schemas/types.yaml#/definitions/phandle
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description: >
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Phandle of the I2C controller used for DDC EDID probing
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hpd-gpios:
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description: >
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The GPIO pin for the HDMI hotplug detect (if it doesn't appear
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as an interrupt/status bit in the HDMI controller itself)
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dmas:
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maxItems: 1
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description: >
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Should contain one entry pointing to the DMA channel used to
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transfer audio data.
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dma-names:
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const: audio-rx
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resets:
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maxItems: 1
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required:
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- compatible
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- reg
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- reg-names
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- clocks
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- resets
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- ddc
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additionalProperties: false
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examples:
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- |
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hdmi0: hdmi@7ef00700 {
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compatible = "brcm,bcm2711-hdmi0";
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reg = <0x7ef00700 0x300>,
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<0x7ef00300 0x200>,
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<0x7ef00f00 0x80>,
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<0x7ef00f80 0x80>,
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<0x7ef01b00 0x200>,
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<0x7ef01f00 0x400>,
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<0x7ef00200 0x80>,
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<0x7ef04300 0x100>,
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<0x7ef20000 0x100>;
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reg-names = "hdmi",
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"dvp",
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"phy",
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"rm",
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"packet",
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"metadata",
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"csc",
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"cec",
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"hd";
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clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>;
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clock-names = "hdmi", "bvb", "audio", "cec";
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resets = <&dvp 0>;
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ddc = <&ddc0>;
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};
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...

Documentation/devicetree/bindings/display/brcm,bcm2835-hvs.yaml

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properties:
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compatible:
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const: brcm,bcm2835-hvs
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enum:
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- brcm,bcm2711-hvs
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- brcm,bcm2835-hvs
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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description: Core Clock
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required:
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- compatible
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- reg
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- interrupts
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additionalProperties: false
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if:
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properties:
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compatible:
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contains:
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const: brcm,bcm2711-hvs"
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then:
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required:
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- clocks
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examples:
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- |
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hvs@7e400000 {

Documentation/devicetree/bindings/display/brcm,bcm2835-pixelvalve0.yaml

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- brcm,bcm2835-pixelvalve0
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- brcm,bcm2835-pixelvalve1
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- brcm,bcm2835-pixelvalve2
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- brcm,bcm2711-pixelvalve0
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- brcm,bcm2711-pixelvalve1
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- brcm,bcm2711-pixelvalve2
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- brcm,bcm2711-pixelvalve3
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- brcm,bcm2711-pixelvalve4
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reg:
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maxItems: 1

Documentation/devicetree/bindings/display/brcm,bcm2835-vc4.yaml

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properties:
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compatible:
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enum:
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- brcm,bcm2711-vc5
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- brcm,bcm2835-vc4
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- brcm,cygnus-vc4
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2019 NXP
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: iMX8MQ Display Controller Subsystem (DCSS)
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maintainers:
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- Laurentiu Palcu <laurentiu.palcu@nxp.com>
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description:
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The DCSS (display controller sub system) is used to source up to three
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display buffers, compose them, and drive a display using HDMI 2.0a(with HDCP
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2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10
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image processing capabilities are included to provide a solution capable of
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driving next generation high dynamic range displays.
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properties:
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compatible:
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const: nxp,imx8mq-dcss
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reg:
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items:
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- description: DCSS base address and size, up to IRQ steer start
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- description: DCSS BLKCTL base address and size
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interrupts:
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items:
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- description: Context loader completion and error interrupt
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- description: DTG interrupt used to signal context loader trigger time
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- description: DTG interrupt for Vblank
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interrupt-names:
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items:
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- const: ctxld
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- const: ctxld_kick
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- const: vblank
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clocks:
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items:
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- description: Display APB clock for all peripheral PIO access interfaces
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- description: Display AXI clock needed by DPR, Scaler, RTRAM_CTRL
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- description: RTRAM clock
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- description: Pixel clock, can be driven either by HDMI phy clock or MIPI
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- description: DTRC clock, needed by video decompressor
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clock-names:
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items:
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- const: apb
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- const: axi
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- const: rtrm
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- const: pix
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- const: dtrc
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assigned-clocks:
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items:
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- description: Phandle and clock specifier of IMX8MQ_CLK_DISP_AXI_ROOT
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- description: Phandle and clock specifier of IMX8MQ_CLK_DISP_RTRM
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- description: Phandle and clock specifier of either IMX8MQ_VIDEO2_PLL1_REF_SEL or
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IMX8MQ_VIDEO_PLL1_REF_SEL
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assigned-clock-parents:
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items:
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- description: Phandle and clock specifier of IMX8MQ_SYS1_PLL_800M
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- description: Phandle and clock specifier of IMX8MQ_SYS1_PLL_800M
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- description: Phandle and clock specifier of IMX8MQ_CLK_27M
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assigned-clock-rates:
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items:
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- description: Must be 800 MHz
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- description: Must be 400 MHz
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port:
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type: object
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description:
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A port node pointing to the input port of a HDMI/DP or MIPI display bridge.
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx8mq-clock.h>
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dcss: display-controller@32e00000 {
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compatible = "nxp,imx8mq-dcss";
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reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>;
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interrupts = <6>, <8>, <9>;
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interrupt-names = "ctxld", "ctxld_kick", "vblank";
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interrupt-parent = <&irqsteer>;
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clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>, <&clk IMX8MQ_CLK_DISP_AXI_ROOT>,
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<&clk IMX8MQ_CLK_DISP_RTRM_ROOT>, <&clk IMX8MQ_VIDEO2_PLL_OUT>,
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<&clk IMX8MQ_CLK_DISP_DTRC>;
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clock-names = "apb", "axi", "rtrm", "pix", "dtrc";
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assigned-clocks = <&clk IMX8MQ_CLK_DISP_AXI>, <&clk IMX8MQ_CLK_DISP_RTRM>,
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<&clk IMX8MQ_VIDEO2_PLL1_REF_SEL>;
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assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>, <&clk IMX8MQ_SYS1_PLL_800M>,
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<&clk IMX8MQ_CLK_27M>;
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assigned-clock-rates = <800000000>,
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<400000000>;
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port {
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dcss_out: endpoint {
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remote-endpoint = <&hdmi_in>;
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};
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};
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};
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Documentation/devicetree/bindings/display/ssd1307fb.txt

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- vbat-supply: The supply for VBAT
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- solomon,segment-no-remap: Display needs normal (non-inverted) data column
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to segment mapping
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- solomon,col-offset: Offset of columns (COL/SEG) that the screen is mapped to.
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- solomon,com-seq: Display uses sequential COM pin configuration
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- solomon,com-lrremap: Display uses left-right COM pin remap
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- solomon,com-invdir: Display uses inverted COM pin scan direction

Documentation/driver-api/driver-model/devres.rst

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dmam_pool_destroy()
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DRM
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devm_drm_dev_init()
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devm_drm_dev_alloc()
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GPIO
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devm_gpiod_get()

Documentation/fb/fbcon.rst

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================
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The framebuffer console can be enabled by using your favorite kernel
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configuration tool. It is under Device Drivers->Graphics Support->Frame
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buffer Devices->Console display driver support->Framebuffer Console Support.
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configuration tool. It is under Device Drivers->Graphics Support->
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Console display driver support->Framebuffer Console Support.
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Select 'y' to compile support statically or 'm' for module support. The
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Documentation/userspace-api/ioctl/ioctl-number.rst

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0xEC 00-01 drivers/platform/chrome/cros_ec_dev.h ChromeOS EC driver
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0xF3 00-3F drivers/usb/misc/sisusbvga/sisusb.h sisfb (in development)
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<mailto:thomas@winischhofer.net>
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0xF4 00-1F video/mbxfb.h mbxfb
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<mailto:raph@8d.com>
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0xF6 all LTTng Linux Trace Toolkit Next Generation
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<mailto:mathieu.desnoyers@efficios.com>
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0xFD all linux/dm-ioctl.h

MAINTAINERS

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DRM DRIVER FOR ASPEED BMC GFX
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M: Joel Stanley <joel@jms.id.au>
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L: linux-aspeed@lists.ozlabs.org
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L: linux-aspeed@lists.ozlabs.org (moderated for non-subscribers)
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S: Supported
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T: git git://anongit.freedesktop.org/drm/drm-misc
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F: Documentation/devicetree/bindings/gpu/aspeed-gfx.txt
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F: drivers/gpu/drm/aspeed/
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DRM DRIVER FOR AST SERVER GRAPHICS CHIPS
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M: Dave Airlie <airlied@redhat.com>
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S: Odd Fixes
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R: Thomas Zimmermann <tzimmermann@suse.de>
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L: dri-devel@lists.freedesktop.org
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S: Supported
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T: git git://anongit.freedesktop.org/drm/drm-misc
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F: drivers/gpu/drm/ast/
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DRM DRIVER FOR BOCHS VIRTUAL GPU
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DRM DRIVER FOR MGA G200 GRAPHICS CHIPS
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M: Dave Airlie <airlied@redhat.com>
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S: Odd Fixes
5513+
R: Thomas Zimmermann <tzimmermann@suse.de>
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L: dri-devel@lists.freedesktop.org
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S: Supported
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T: git git://anongit.freedesktop.org/drm/drm-misc
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F: drivers/gpu/drm/mgag200/
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DRM DRIVER FOR MI0283QT
@@ -5652,13 +5658,15 @@ F: drivers/gpu/drm/panel/panel-tpo-tpg110.c
56525658
DRM DRIVER FOR USB DISPLAYLINK VIDEO ADAPTERS
56535659
M: Dave Airlie <airlied@redhat.com>
56545660
R: Sean Paul <sean@poorly.run>
5661+
R: Thomas Zimmermann <tzimmermann@suse.de>
56555662
L: dri-devel@lists.freedesktop.org
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S: Odd Fixes
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S: Supported
56575664
T: git git://anongit.freedesktop.org/drm/drm-misc
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F: drivers/gpu/drm/udl/
56595666

56605667
DRM DRIVER FOR VIRTUAL KERNEL MODESETTING (VKMS)
56615668
M: Rodrigo Siqueira <rodrigosiqueiramelo@gmail.com>
5669+
M: Melissa Wen <melissa.srw@gmail.com>
56625670
R: Haneen Mohammed <hamohammed.sa@gmail.com>
56635671
R: Daniel Vetter <daniel@ffwll.ch>
56645672
L: dri-devel@lists.freedesktop.org
@@ -12462,6 +12470,14 @@ F: drivers/iio/gyro/fxas21002c_core.c
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F: drivers/iio/gyro/fxas21002c_i2c.c
1246312471
F: drivers/iio/gyro/fxas21002c_spi.c
1246412472

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NXP i.MX 8MQ DCSS DRIVER
12474+
M: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
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R: Lucas Stach <l.stach@pengutronix.de>
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L: dri-devel@lists.freedesktop.org
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S: Maintained
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F: Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml
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F: drivers/gpu/drm/imx/dcss/
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NXP SGTL5000 DRIVER
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M: Fabio Estevam <festevam@gmail.com>
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L: alsa-devel@alsa-project.org (moderated for non-subscribers)

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