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clk: tegra: Update kerneldoc to match prototypes
For some DFLL functions, the kerneldoc comments don't match the function prototype. Fix them up to avoid some warnings at build time. Signed-off-by: Thierry Reding <treding@nvidia.com>
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Lines changed: 4 additions & 4 deletions

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drivers/clk/tegra/clk-dfll.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -667,7 +667,7 @@ static int dfll_force_output(struct tegra_dfll *td, unsigned int out_sel)
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}
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/**
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* dfll_load_lut - load the voltage lookup table
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* dfll_load_i2c_lut - load the voltage lookup table
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* @td: struct tegra_dfll *
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*
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* Load the voltage-to-PMIC register value lookup table into the DFLL
@@ -898,7 +898,7 @@ static void dfll_set_frequency_request(struct tegra_dfll *td,
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}
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/**
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* tegra_dfll_request_rate - set the next rate for the DFLL to tune to
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* dfll_request_rate - set the next rate for the DFLL to tune to
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* @td: DFLL instance
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* @rate: clock rate to target
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*
@@ -1006,7 +1006,7 @@ static void dfll_set_open_loop_config(struct tegra_dfll *td)
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}
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/**
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* tegra_dfll_lock - switch from open-loop to closed-loop mode
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* dfll_lock - switch from open-loop to closed-loop mode
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* @td: DFLL instance
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*
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* Switch from OPEN_LOOP state to CLOSED_LOOP state. Returns 0 upon success,
@@ -1047,7 +1047,7 @@ static int dfll_lock(struct tegra_dfll *td)
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}
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/**
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* tegra_dfll_unlock - switch from closed-loop to open-loop mode
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* dfll_unlock - switch from closed-loop to open-loop mode
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* @td: DFLL instance
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*
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* Switch from CLOSED_LOOP state to OPEN_LOOP state. Returns 0 upon success,

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