@@ -920,9 +920,6 @@ static void stm32_pmx_get_mode(struct stm32_gpio_bank *bank, int pin, u32 *mode,
920920 u32 val ;
921921 int alt_shift = (pin % 8 ) * 4 ;
922922 int alt_offset = STM32_GPIO_AFRL + (pin / 8 ) * 4 ;
923- unsigned long flags ;
924-
925- spin_lock_irqsave (& bank -> lock , flags );
926923
927924 val = readl_relaxed (bank -> base + alt_offset );
928925 val &= GENMASK (alt_shift + 3 , alt_shift );
@@ -931,8 +928,6 @@ static void stm32_pmx_get_mode(struct stm32_gpio_bank *bank, int pin, u32 *mode,
931928 val = readl_relaxed (bank -> base + STM32_GPIO_MODER );
932929 val &= GENMASK (pin * 2 + 1 , pin * 2 );
933930 * mode = val >> (pin * 2 );
934-
935- spin_unlock_irqrestore (& bank -> lock , flags );
936931}
937932
938933static int stm32_pmx_set_mux (struct pinctrl_dev * pctldev ,
@@ -1050,16 +1045,11 @@ static int stm32_pconf_set_driving(struct stm32_gpio_bank *bank,
10501045static u32 stm32_pconf_get_driving (struct stm32_gpio_bank * bank ,
10511046 unsigned int offset )
10521047{
1053- unsigned long flags ;
10541048 u32 val ;
10551049
1056- spin_lock_irqsave (& bank -> lock , flags );
1057-
10581050 val = readl_relaxed (bank -> base + STM32_GPIO_TYPER );
10591051 val &= BIT (offset );
10601052
1061- spin_unlock_irqrestore (& bank -> lock , flags );
1062-
10631053 return (val >> offset );
10641054}
10651055
@@ -1101,16 +1091,11 @@ static int stm32_pconf_set_speed(struct stm32_gpio_bank *bank,
11011091static u32 stm32_pconf_get_speed (struct stm32_gpio_bank * bank ,
11021092 unsigned int offset )
11031093{
1104- unsigned long flags ;
11051094 u32 val ;
11061095
1107- spin_lock_irqsave (& bank -> lock , flags );
1108-
11091096 val = readl_relaxed (bank -> base + STM32_GPIO_SPEEDR );
11101097 val &= GENMASK (offset * 2 + 1 , offset * 2 );
11111098
1112- spin_unlock_irqrestore (& bank -> lock , flags );
1113-
11141099 return (val >> (offset * 2 ));
11151100}
11161101
@@ -1152,36 +1137,26 @@ static int stm32_pconf_set_bias(struct stm32_gpio_bank *bank,
11521137static u32 stm32_pconf_get_bias (struct stm32_gpio_bank * bank ,
11531138 unsigned int offset )
11541139{
1155- unsigned long flags ;
11561140 u32 val ;
11571141
1158- spin_lock_irqsave (& bank -> lock , flags );
1159-
11601142 val = readl_relaxed (bank -> base + STM32_GPIO_PUPDR );
11611143 val &= GENMASK (offset * 2 + 1 , offset * 2 );
11621144
1163- spin_unlock_irqrestore (& bank -> lock , flags );
1164-
11651145 return (val >> (offset * 2 ));
11661146}
11671147
11681148static bool stm32_pconf_get (struct stm32_gpio_bank * bank ,
11691149 unsigned int offset , bool dir )
11701150{
1171- unsigned long flags ;
11721151 u32 val ;
11731152
1174- spin_lock_irqsave (& bank -> lock , flags );
1175-
11761153 if (dir )
11771154 val = !!(readl_relaxed (bank -> base + STM32_GPIO_IDR ) &
11781155 BIT (offset ));
11791156 else
11801157 val = !!(readl_relaxed (bank -> base + STM32_GPIO_ODR ) &
11811158 BIT (offset ));
11821159
1183- spin_unlock_irqrestore (& bank -> lock , flags );
1184-
11851160 return val ;
11861161}
11871162
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