@@ -162,15 +162,26 @@ static void amd_iommu_domain_get_pgtable(struct protection_domain *domain,
162162 pgtable -> mode = pt_root & 7 ; /* lowest 3 bits encode pgtable mode */
163163}
164164
165- static u64 amd_iommu_domain_encode_pgtable (u64 * root , int mode )
165+ static void amd_iommu_domain_set_pt_root (struct protection_domain * domain , u64 root )
166+ {
167+ atomic64_set (& domain -> pt_root , root );
168+ }
169+
170+ static void amd_iommu_domain_clr_pt_root (struct protection_domain * domain )
171+ {
172+ amd_iommu_domain_set_pt_root (domain , 0 );
173+ }
174+
175+ static void amd_iommu_domain_set_pgtable (struct protection_domain * domain ,
176+ u64 * root , int mode )
166177{
167178 u64 pt_root ;
168179
169180 /* lowest 3 bits encode pgtable mode */
170181 pt_root = mode & 7 ;
171182 pt_root |= (u64 )root ;
172183
173- return pt_root ;
184+ amd_iommu_domain_set_pt_root ( domain , pt_root ) ;
174185}
175186
176187static struct iommu_dev_data * alloc_dev_data (u16 devid )
@@ -1410,7 +1421,7 @@ static bool increase_address_space(struct protection_domain *domain,
14101421 struct domain_pgtable pgtable ;
14111422 unsigned long flags ;
14121423 bool ret = true;
1413- u64 * pte , root ;
1424+ u64 * pte ;
14141425
14151426 spin_lock_irqsave (& domain -> lock , flags );
14161427
@@ -1438,8 +1449,7 @@ static bool increase_address_space(struct protection_domain *domain,
14381449 * Device Table needs to be updated and flushed before the new root can
14391450 * be published.
14401451 */
1441- root = amd_iommu_domain_encode_pgtable (pte , pgtable .mode );
1442- atomic64_set (& domain -> pt_root , root );
1452+ amd_iommu_domain_set_pgtable (domain , pte , pgtable .mode );
14431453
14441454 ret = true;
14451455
@@ -2319,15 +2329,15 @@ static void protection_domain_free(struct protection_domain *domain)
23192329 domain_id_free (domain -> id );
23202330
23212331 amd_iommu_domain_get_pgtable (domain , & pgtable );
2322- atomic64_set ( & domain -> pt_root , 0 );
2332+ amd_iommu_domain_clr_pt_root ( domain );
23232333 free_pagetable (& pgtable );
23242334
23252335 kfree (domain );
23262336}
23272337
23282338static int protection_domain_init (struct protection_domain * domain , int mode )
23292339{
2330- u64 * pt_root = NULL , root ;
2340+ u64 * pt_root = NULL ;
23312341
23322342 BUG_ON (mode < PAGE_MODE_NONE || mode > PAGE_MODE_6_LEVEL );
23332343
@@ -2343,8 +2353,7 @@ static int protection_domain_init(struct protection_domain *domain, int mode)
23432353 return - ENOMEM ;
23442354 }
23452355
2346- root = amd_iommu_domain_encode_pgtable (pt_root , mode );
2347- atomic64_set (& domain -> pt_root , root );
2356+ amd_iommu_domain_set_pgtable (domain , pt_root , mode );
23482357
23492358 return 0 ;
23502359}
@@ -2713,8 +2722,8 @@ void amd_iommu_domain_direct_map(struct iommu_domain *dom)
27132722 /* First save pgtable configuration*/
27142723 amd_iommu_domain_get_pgtable (domain , & pgtable );
27152724
2716- /* Update data structure */
2717- atomic64_set ( & domain -> pt_root , 0 );
2725+ /* Remove page-table from domain */
2726+ amd_iommu_domain_clr_pt_root ( domain );
27182727
27192728 /* Make changes visible to IOMMUs */
27202729 update_domain (domain );
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