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yifancomalexdeucher
yifancom
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alexdeucher
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drm/amd/pm: drop most smu_cmn_get_smc_version in smu
smu_check_fw_version is called in smu hw init, thus smu if version and version are garenteed to be stored in smu context. No need to call smu_cmn_get_smc_version again after system boot up. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
1 parent ce6eb95 commit 710d9ca

7 files changed

Lines changed: 61 additions & 240 deletions

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‎drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c‎

Lines changed: 12 additions & 59 deletions
Original file line numberDiff line numberDiff line change
@@ -963,17 +963,10 @@ static int arcturus_force_clk_levels(struct smu_context *smu,
963963
struct smu_11_0_dpm_context *dpm_context = smu->smu_dpm.dpm_context;
964964
struct smu_11_0_dpm_table *single_dpm_table = NULL;
965965
uint32_t soft_min_level, soft_max_level;
966-
uint32_t smu_version;
967966
int ret = 0;
968967

969-
ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
970-
if (ret) {
971-
dev_err(smu->adev->dev, "Failed to get smu version!\n");
972-
return ret;
973-
}
974-
975-
if ((smu_version >= 0x361200) &&
976-
(smu_version <= 0x361a00)) {
968+
if ((smu->smc_fw_version >= 0x361200) &&
969+
(smu->smc_fw_version <= 0x361a00)) {
977970
dev_err(smu->adev->dev, "Forcing clock level is not supported with "
978971
"54.18 - 54.26(included) SMU firmwares\n");
979972
return -EOPNOTSUPP;
@@ -1344,16 +1337,11 @@ static int arcturus_get_power_profile_mode(struct smu_context *smu,
13441337
uint32_t i, size = 0;
13451338
int16_t workload_type = 0;
13461339
int result = 0;
1347-
uint32_t smu_version;
13481340

13491341
if (!buf)
13501342
return -EINVAL;
13511343

1352-
result = smu_cmn_get_smc_version(smu, NULL, &smu_version);
1353-
if (result)
1354-
return result;
1355-
1356-
if (smu_version >= 0x360d00)
1344+
if (smu->smc_fw_version >= 0x360d00)
13571345
size += sysfs_emit_at(buf, size, "%16s %s %s %s %s %s %s %s %s %s %s\n",
13581346
title[0], title[1], title[2], title[3], title[4], title[5],
13591347
title[6], title[7], title[8], title[9], title[10]);
@@ -1372,7 +1360,7 @@ static int arcturus_get_power_profile_mode(struct smu_context *smu,
13721360
if (workload_type < 0)
13731361
continue;
13741362

1375-
if (smu_version >= 0x360d00) {
1363+
if (smu->smc_fw_version >= 0x360d00) {
13761364
result = smu_cmn_update_table(smu,
13771365
SMU_TABLE_ACTIVITY_MONITOR_COEFF,
13781366
workload_type,
@@ -1387,7 +1375,7 @@ static int arcturus_get_power_profile_mode(struct smu_context *smu,
13871375
size += sysfs_emit_at(buf, size, "%2d %14s%s\n",
13881376
i, amdgpu_pp_profile_name[i], (i == smu->power_profile_mode) ? "*" : " ");
13891377

1390-
if (smu_version >= 0x360d00) {
1378+
if (smu->smc_fw_version >= 0x360d00) {
13911379
size += sysfs_emit_at(buf, size, "%19s %d(%13s) %7d %7d %7d %7d %7d %7d %7d %7d %7d\n",
13921380
" ",
13931381
0,
@@ -1429,19 +1417,15 @@ static int arcturus_set_power_profile_mode(struct smu_context *smu,
14291417
int workload_type = 0;
14301418
uint32_t profile_mode = input[size];
14311419
int ret = 0;
1432-
uint32_t smu_version;
14331420

14341421
if (profile_mode > PP_SMC_POWER_PROFILE_CUSTOM) {
14351422
dev_err(smu->adev->dev, "Invalid power profile mode %d\n", profile_mode);
14361423
return -EINVAL;
14371424
}
14381425

1439-
ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
1440-
if (ret)
1441-
return ret;
14421426

14431427
if ((profile_mode == PP_SMC_POWER_PROFILE_CUSTOM) &&
1444-
(smu_version >= 0x360d00)) {
1428+
(smu->smc_fw_version >= 0x360d00)) {
14451429
ret = smu_cmn_update_table(smu,
14461430
SMU_TABLE_ACTIVITY_MONITOR_COEFF,
14471431
WORKLOAD_PPLIB_CUSTOM_BIT,
@@ -1517,24 +1501,15 @@ static int arcturus_set_power_profile_mode(struct smu_context *smu,
15171501
static int arcturus_set_performance_level(struct smu_context *smu,
15181502
enum amd_dpm_forced_level level)
15191503
{
1520-
uint32_t smu_version;
1521-
int ret;
1522-
1523-
ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
1524-
if (ret) {
1525-
dev_err(smu->adev->dev, "Failed to get smu version!\n");
1526-
return ret;
1527-
}
1528-
15291504
switch (level) {
15301505
case AMD_DPM_FORCED_LEVEL_HIGH:
15311506
case AMD_DPM_FORCED_LEVEL_LOW:
15321507
case AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD:
15331508
case AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK:
15341509
case AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK:
15351510
case AMD_DPM_FORCED_LEVEL_PROFILE_PEAK:
1536-
if ((smu_version >= 0x361200) &&
1537-
(smu_version <= 0x361a00)) {
1511+
if ((smu->smc_fw_version >= 0x361200) &&
1512+
(smu->smc_fw_version <= 0x361a00)) {
15381513
dev_err(smu->adev->dev, "Forcing clock level is not supported with "
15391514
"54.18 - 54.26(included) SMU firmwares\n");
15401515
return -EOPNOTSUPP;
@@ -2172,16 +2147,11 @@ static void arcturus_i2c_control_fini(struct smu_context *smu)
21722147
static void arcturus_get_unique_id(struct smu_context *smu)
21732148
{
21742149
struct amdgpu_device *adev = smu->adev;
2175-
uint32_t top32 = 0, bottom32 = 0, smu_version;
2150+
uint32_t top32 = 0, bottom32 = 0;
21762151
uint64_t id;
21772152

2178-
if (smu_cmn_get_smc_version(smu, NULL, &smu_version)) {
2179-
dev_warn(adev->dev, "Failed to get smu version, cannot get unique_id or serial_number\n");
2180-
return;
2181-
}
2182-
21832153
/* PPSMC_MSG_ReadSerial* is supported by 54.23.0 and onwards */
2184-
if (smu_version < 0x361700) {
2154+
if (smu->smc_fw_version < 0x361700) {
21852155
dev_warn(adev->dev, "ReadSerial is only supported by PMFW 54.23.0 and onwards\n");
21862156
return;
21872157
}
@@ -2198,8 +2168,6 @@ static int arcturus_set_df_cstate(struct smu_context *smu,
21982168
enum pp_df_cstate state)
21992169
{
22002170
struct amdgpu_device *adev = smu->adev;
2201-
uint32_t smu_version;
2202-
int ret;
22032171

22042172
/*
22052173
* Arcturus does not need the cstate disablement
@@ -2208,14 +2176,8 @@ static int arcturus_set_df_cstate(struct smu_context *smu,
22082176
if (amdgpu_in_reset(adev) || adev->in_suspend)
22092177
return 0;
22102178

2211-
ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
2212-
if (ret) {
2213-
dev_err(smu->adev->dev, "Failed to get smu version!\n");
2214-
return ret;
2215-
}
2216-
22172179
/* PPSMC_MSG_DFCstateControl is supported by 54.15.0 and onwards */
2218-
if (smu_version < 0x360F00) {
2180+
if (smu->smc_fw_version < 0x360F00) {
22192181
dev_err(smu->adev->dev, "DFCstateControl is only supported by PMFW 54.15.0 and onwards\n");
22202182
return -EINVAL;
22212183
}
@@ -2226,17 +2188,8 @@ static int arcturus_set_df_cstate(struct smu_context *smu,
22262188
static int arcturus_select_xgmi_plpd_policy(struct smu_context *smu,
22272189
enum pp_xgmi_plpd_mode mode)
22282190
{
2229-
uint32_t smu_version;
2230-
int ret;
2231-
2232-
ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
2233-
if (ret) {
2234-
dev_err(smu->adev->dev, "Failed to get smu version!\n");
2235-
return ret;
2236-
}
2237-
22382191
/* PPSMC_MSG_GmiPwrDnControl is supported by 54.23.0 and onwards */
2239-
if (smu_version < 0x00361700) {
2192+
if (smu->smc_fw_version < 0x00361700) {
22402193
dev_err(smu->adev->dev, "XGMI power down control is only supported by PMFW 54.23.0 and onwards\n");
22412194
return -EINVAL;
22422195
}

‎drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c‎

Lines changed: 8 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -907,18 +907,11 @@ static int navi1x_get_smu_metrics_data(struct smu_context *smu,
907907
uint32_t *value)
908908
{
909909
struct amdgpu_device *adev = smu->adev;
910-
uint32_t smu_version;
911910
int ret = 0;
912911

913-
ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
914-
if (ret) {
915-
dev_err(adev->dev, "Failed to get smu version!\n");
916-
return ret;
917-
}
918-
919912
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
920913
case IP_VERSION(11, 0, 9):
921-
if (smu_version > 0x00341C00)
914+
if (smu->smc_fw_version > 0x00341C00)
922915
ret = navi12_get_smu_metrics_data(smu, member, value);
923916
else
924917
ret = navi12_get_legacy_smu_metrics_data(smu, member, value);
@@ -928,10 +921,10 @@ static int navi1x_get_smu_metrics_data(struct smu_context *smu,
928921
default:
929922
if (((amdgpu_ip_version(adev, MP1_HWIP, 0) ==
930923
IP_VERSION(11, 0, 5)) &&
931-
smu_version > 0x00351F00) ||
924+
smu->smc_fw_version > 0x00351F00) ||
932925
((amdgpu_ip_version(adev, MP1_HWIP, 0) ==
933926
IP_VERSION(11, 0, 0)) &&
934-
smu_version > 0x002A3B00))
927+
smu->smc_fw_version > 0x002A3B00))
935928
ret = navi10_get_smu_metrics_data(smu, member, value);
936929
else
937930
ret = navi10_get_legacy_smu_metrics_data(smu, member, value);
@@ -2847,19 +2840,12 @@ static int navi10_run_umc_cdr_workaround(struct smu_context *smu)
28472840
struct amdgpu_device *adev = smu->adev;
28482841
uint8_t umc_fw_greater_than_v136 = false;
28492842
uint8_t umc_fw_disable_cdr = false;
2850-
uint32_t pmfw_version;
28512843
uint32_t param;
28522844
int ret = 0;
28532845

28542846
if (!navi10_need_umc_cdr_workaround(smu))
28552847
return 0;
28562848

2857-
ret = smu_cmn_get_smc_version(smu, NULL, &pmfw_version);
2858-
if (ret) {
2859-
dev_err(adev->dev, "Failed to get smu version!\n");
2860-
return ret;
2861-
}
2862-
28632849
/*
28642850
* The messages below are only supported by Navi10 42.53.0 and later
28652851
* PMFWs and Navi14 53.29.0 and later PMFWs.
@@ -2868,9 +2854,9 @@ static int navi10_run_umc_cdr_workaround(struct smu_context *smu)
28682854
* - PPSMC_MSG_GetUMCFWWA
28692855
*/
28702856
if (((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 0)) &&
2871-
(pmfw_version >= 0x2a3500)) ||
2857+
(smu->smc_fw_version >= 0x2a3500)) ||
28722858
((amdgpu_ip_version(adev, MP1_HWIP, 0) == IP_VERSION(11, 0, 5)) &&
2873-
(pmfw_version >= 0x351D00))) {
2859+
(smu->smc_fw_version >= 0x351D00))) {
28742860
ret = smu_cmn_send_smc_msg_with_param(smu,
28752861
SMU_MSG_GET_UMC_FW_WA,
28762862
0,
@@ -3355,18 +3341,11 @@ static ssize_t navi1x_get_gpu_metrics(struct smu_context *smu,
33553341
void **table)
33563342
{
33573343
struct amdgpu_device *adev = smu->adev;
3358-
uint32_t smu_version;
33593344
int ret = 0;
33603345

3361-
ret = smu_cmn_get_smc_version(smu, NULL, &smu_version);
3362-
if (ret) {
3363-
dev_err(adev->dev, "Failed to get smu version!\n");
3364-
return ret;
3365-
}
3366-
33673346
switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
33683347
case IP_VERSION(11, 0, 9):
3369-
if (smu_version > 0x00341C00)
3348+
if (smu->smc_fw_version > 0x00341C00)
33703349
ret = navi12_get_gpu_metrics(smu, table);
33713350
else
33723351
ret = navi12_get_legacy_gpu_metrics(smu, table);
@@ -3376,10 +3355,10 @@ static ssize_t navi1x_get_gpu_metrics(struct smu_context *smu,
33763355
default:
33773356
if (((amdgpu_ip_version(adev, MP1_HWIP, 0) ==
33783357
IP_VERSION(11, 0, 5)) &&
3379-
smu_version > 0x00351F00) ||
3358+
smu->smc_fw_version > 0x00351F00) ||
33803359
((amdgpu_ip_version(adev, MP1_HWIP, 0) ==
33813360
IP_VERSION(11, 0, 0)) &&
3382-
smu_version > 0x002A3B00))
3361+
smu->smc_fw_version > 0x002A3B00))
33833362
ret = navi10_get_gpu_metrics(smu, table);
33843363
else
33853364
ret = navi10_get_legacy_gpu_metrics(smu, table);

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