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Merge tag 'drm-misc-next-2024-02-22' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
drm-misc-next for v6.9: UAPI Changes: - changes to fdinfo stats Cross-subsystem Changes: agp: - remove unused type field from struct agp_bridge_data Core Changes: ci: - update test names - cleanups gem: - add stats for shared buffers plus updates to amdgpu, i915, xe Documentation: - fixes syncobj: - fixes to waiting and sleeping Driver Changes: bridge: - adv7511: fix crash on irq during probe - dw_hdmi: set bridge type host1x: - cleanups ivpu: - updates to firmware API - refactor BO allocation meson: - fix error handling in probe panel: - revert "drm/panel-edp: Add auo_b116xa3_mode" - add Himax HX83112A plus DT bindings - ltk500hd1829: add support for ltk101b4029w and admatec 9904370 - simple: add BOE BP082WX1-100 8.2" panel plus DT bindungs renesas: - add RZ/G2L DU support plus DT bindings Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> From: Thomas Zimmermann <tzimmermann@suse.de> Link: https://patchwork.freedesktop.org/patch/msgid/20240222135841.GA6677@localhost.localdomain
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Lines changed: 3748 additions & 1279 deletions

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‎Documentation/devicetree/bindings/display/panel/himax,hx83112a.yaml‎

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/panel/himax,hx83112a.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Himax HX83112A-based DSI display panels
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maintainers:
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- Luca Weiss <luca.weiss@fairphone.com>
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description:
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The Himax HX83112A is a generic DSI Panel IC used to control
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LCD panels.
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allOf:
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- $ref: panel-common.yaml#
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properties:
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compatible:
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contains:
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const: djn,9a-3r063-1102b
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vdd1-supply:
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description: Digital voltage rail
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vsn-supply:
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description: Positive source voltage rail
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vsp-supply:
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description: Negative source voltage rail
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reg: true
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port: true
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required:
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- compatible
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- reg
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- reset-gpios
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- vdd1-supply
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- vsn-supply
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- vsp-supply
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- port
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/gpio/gpio.h>
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dsi {
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#address-cells = <1>;
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#size-cells = <0>;
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panel@0 {
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compatible = "djn,9a-3r063-1102b";
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reg = <0>;
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backlight = <&pm6150l_wled>;
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reset-gpios = <&pm6150l_gpios 9 GPIO_ACTIVE_LOW>;
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vdd1-supply = <&vreg_l1e>;
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vsn-supply = <&pm6150l_lcdb_ncp>;
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vsp-supply = <&pm6150l_lcdb_ldo>;
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port {
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panel_in_0: endpoint {
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remote-endpoint = <&dsi0_out>;
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};
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};
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};
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};
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...

‎Documentation/devicetree/bindings/display/panel/leadtek,ltk500hd1829.yaml‎

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@@ -14,7 +14,9 @@ allOf:
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properties:
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compatible:
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const: leadtek,ltk500hd1829
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enum:
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- leadtek,ltk101b4029w
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- leadtek,ltk500hd1829
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reg: true
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backlight: true
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reset-gpios: true

‎Documentation/devicetree/bindings/display/panel/panel-lvds.yaml‎

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compatible:
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items:
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- enum:
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# Admatec 9904379 10.1" 1024x600 LVDS panel
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- admatec,9904379
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- auo,b101ew05
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# Chunghwa Picture Tubes Ltd. 7" WXGA (800x1280) TFT LCD LVDS panel
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- chunghwa,claa070wp03xg

‎Documentation/devicetree/bindings/display/panel/panel-simple.yaml‎

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- auo,t215hvn01
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# Shanghai AVIC Optoelectronics 7" 1024x600 color TFT-LCD panel
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- avic,tm070ddh03
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# BOE BP082WX1-100 8.2" WXGA (1280x800) LVDS panel
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- boe,bp082wx1-100
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# BOE BP101WX1-100 10.1" WXGA (1280x800) LVDS panel
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- boe,bp101wx1-100
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# BOE EV121WXM-N10-1850 12.1" WXGA (1280x800) TFT LCD panel

‎Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml‎

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/display/renesas,rzg2l-du.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas RZ/G2L Display Unit (DU)
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maintainers:
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- Biju Das <biju.das.jz@bp.renesas.com>
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- Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
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description: |
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These DT bindings describe the Display Unit embedded in the Renesas RZ/G2L
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and RZ/V2L SoCs.
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properties:
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compatible:
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oneOf:
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- enum:
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- renesas,r9a07g044-du # RZ/G2{L,LC}
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- items:
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- enum:
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- renesas,r9a07g054-du # RZ/V2L
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- const: renesas,r9a07g044-du # RZ/G2L fallback
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: Main clock
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- description: Register access clock
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- description: Video clock
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clock-names:
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items:
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- const: aclk
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- const: pclk
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- const: vclk
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resets:
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maxItems: 1
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power-domains:
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maxItems: 1
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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description: |
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The connections to the DU output video ports are modeled using the OF
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graph bindings. The number of ports and their assignment are
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model-dependent. Each port shall have a single endpoint.
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patternProperties:
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"^port@[0-1]$":
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$ref: /schemas/graph.yaml#/properties/port
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unevaluatedProperties: false
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required:
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- port@0
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unevaluatedProperties: false
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renesas,vsps:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:
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items:
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- description: phandle to VSP instance that serves the DU channel
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- description: Channel index identifying the LIF instance in that VSP
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description:
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A list of phandle and channel index tuples to the VSPs that handle the
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memory interfaces for the DU channels.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- resets
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- power-domains
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- ports
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- renesas,vsps
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additionalProperties: false
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examples:
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# RZ/G2L DU
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- |
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#include <dt-bindings/clock/r9a07g044-cpg.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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display@10890000 {
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compatible = "renesas,r9a07g044-du";
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reg = <0x10890000 0x10000>;
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interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD R9A07G044_LCDC_CLK_A>,
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<&cpg CPG_MOD R9A07G044_LCDC_CLK_P>,
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<&cpg CPG_MOD R9A07G044_LCDC_CLK_D>;
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clock-names = "aclk", "pclk", "vclk";
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resets = <&cpg R9A07G044_LCDC_RESET_N>;
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power-domains = <&cpg>;
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renesas,vsps = <&vspd0 0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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endpoint {
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remote-endpoint = <&dsi0_in>;
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};
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};
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port@1 {
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reg = <1>;
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};
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};
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};
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...

‎Documentation/devicetree/bindings/display/ti/ti,am65x-dss.yaml‎

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- description: OVR2 overlay manager for vp2
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- description: VP1 video port 1
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- description: VP2 video port 2
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- description: common1 DSS register area
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reg-names:
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items:
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- const: ovr2
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- const: vp1
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- const: vp2
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- const: common1
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clocks:
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items:
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<0x04a07000 0x1000>, /* ovr1 */
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<0x04a08000 0x1000>, /* ovr2 */
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<0x04a0a000 0x1000>, /* vp1 */
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<0x04a0b000 0x1000>; /* vp2 */
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<0x04a0b000 0x1000>, /* vp2 */
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<0x04a01000 0x1000>; /* common1 */
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reg-names = "common", "vidl1", "vid",
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"ovr1", "ovr2", "vp1", "vp2";
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"ovr1", "ovr2", "vp1", "vp2", "common1";
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ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
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power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
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clocks = <&k3_clks 67 1>,

‎Documentation/devicetree/bindings/vendor-prefixes.yaml‎

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description: Analog Devices, Inc.
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"^adieng,.*":
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description: ADI Engineering, Inc.
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"^admatec,.*":
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description: admatec GmbH
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"^advantech,.*":
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description: Advantech Corporation
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"^aeroflexgaisler,.*":

‎Documentation/gpu/drm-usage-stats.rst‎

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- drm-shared-<region>: <uint> [KiB|MiB]
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The total size of buffers that are shared with another file (ie. have more
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The total size of buffers that are shared with another file (e.g., have more
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than a single handle).
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- drm-total-<region>: <uint> [KiB|MiB]

‎MAINTAINERS‎

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X: drivers/gpu/drm/msm/
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X: drivers/gpu/drm/nouveau/
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X: drivers/gpu/drm/radeon/
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X: drivers/gpu/drm/renesas/
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X: drivers/gpu/drm/renesas/rcar-du/
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X: drivers/gpu/drm/tegra/
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DRM DRIVERS FOR ALLWINNER A10
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F: Documentation/devicetree/bindings/display/renesas,du.yaml
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F: drivers/gpu/drm/renesas/rcar-du/
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DRM DRIVERS FOR RENESAS RZ
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M: Biju Das <biju.das.jz@bp.renesas.com>
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L: dri-devel@lists.freedesktop.org
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L: linux-renesas-soc@vger.kernel.org
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S: Maintained
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T: git git://anongit.freedesktop.org/drm/drm-misc
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F: Documentation/devicetree/bindings/display/renesas,rzg2l-du.yaml
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F: drivers/gpu/drm/renesas/rz-du/
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71967205
DRM DRIVERS FOR RENESAS SHMOBILE
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M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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M: Geert Uytterhoeven <geert+renesas@glider.be>
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L: dri-devel@lists.freedesktop.org
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L: linux-renesas-soc@vger.kernel.org
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S: Supported
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T: git git://anongit.freedesktop.org/drm/drm-misc
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F: Documentation/devicetree/bindings/display/renesas,shmobile-lcdc.yaml
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F: drivers/gpu/drm/renesas/shmobile/
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F: include/linux/platform_data/shmob_drm.h

‎drivers/accel/ivpu/ivpu_debugfs.c‎

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.write = fw_trace_level_fops_write,
287287
};
288288

289-
static ssize_t
290-
ivpu_reset_engine_fn(struct file *file, const char __user *user_buf, size_t size, loff_t *pos)
291-
{
292-
struct ivpu_device *vdev = file->private_data;
293-
294-
if (!size)
295-
return -EINVAL;
296-
297-
if (ivpu_jsm_reset_engine(vdev, DRM_IVPU_ENGINE_COMPUTE))
298-
return -ENODEV;
299-
if (ivpu_jsm_reset_engine(vdev, DRM_IVPU_ENGINE_COPY))
300-
return -ENODEV;
301-
302-
return size;
303-
}
304-
305289
static ssize_t
306290
ivpu_force_recovery_fn(struct file *file, const char __user *user_buf, size_t size, loff_t *pos)
307291
{
@@ -327,6 +311,22 @@ static const struct file_operations ivpu_force_recovery_fops = {
327311
.write = ivpu_force_recovery_fn,
328312
};
329313

314+
static ssize_t
315+
ivpu_reset_engine_fn(struct file *file, const char __user *user_buf, size_t size, loff_t *pos)
316+
{
317+
struct ivpu_device *vdev = file->private_data;
318+
319+
if (!size)
320+
return -EINVAL;
321+
322+
if (ivpu_jsm_reset_engine(vdev, DRM_IVPU_ENGINE_COMPUTE))
323+
return -ENODEV;
324+
if (ivpu_jsm_reset_engine(vdev, DRM_IVPU_ENGINE_COPY))
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return -ENODEV;
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327+
return size;
328+
}
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330330
static const struct file_operations ivpu_reset_engine_fops = {
331331
.owner = THIS_MODULE,
332332
.open = simple_open,

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