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jgunthorpejoergroedel
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vfio: Move the Intel no-snoop control off of IOMMU_CACHE
IOMMU_CACHE means "normal DMA to this iommu_domain's IOVA should be cache coherent" and is used by the DMA API. The definition allows for special non-coherent DMA to exist - ie processing of the no-snoop flag in PCIe TLPs - so long as this behavior is opt-in by the device driver. The flag is mainly used by the DMA API to synchronize the IOMMU setting with the expected cache behavior of the DMA master. eg based on dev_is_dma_coherent() in some case. For Intel IOMMU IOMMU_CACHE was redefined to mean 'force all DMA to be cache coherent' which has the practical effect of causing the IOMMU to ignore the no-snoop bit in a PCIe TLP. x86 platforms are always IOMMU_CACHE, so Intel should ignore this flag. Instead use the new domain op enforce_cache_coherency() which causes every IOPTE created in the domain to have the no-snoop blocking behavior. Reconfigure VFIO to always use IOMMU_CACHE and call enforce_cache_coherency() to operate the special Intel behavior. Remove the IOMMU_CACHE test from Intel IOMMU. Ultimately VFIO plumbs the result of enforce_cache_coherency() back into the x86 platform code through kvm_arch_register_noncoherent_dma() which controls if the WBINVD instruction is available in the guest. No other archs implement kvm_arch_register_noncoherent_dma() nor are there any other known consumers of VFIO_DMA_CC_IOMMU that might be affected by the user visible result change on non-x86 archs. Reviewed-by: Kevin Tian <kevin.tian@intel.com> Reviewed-by: Lu Baolu <baolu.lu@linux.intel.com> Acked-by: Alex Williamson <alex.williamson@redhat.com> Acked-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/2-v3-2cf356649677+a32-intel_no_snoop_jgg@nvidia.com Signed-off-by: Joerg Roedel <jroedel@suse.de>
1 parent 6043257 commit 71cfafd

3 files changed

Lines changed: 21 additions & 17 deletions

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drivers/iommu/intel/iommu.c

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -641,7 +641,6 @@ static unsigned long domain_super_pgsize_bitmap(struct dmar_domain *domain)
641641
static void domain_update_iommu_cap(struct dmar_domain *domain)
642642
{
643643
domain_update_iommu_coherency(domain);
644-
domain->iommu_snooping = domain_update_iommu_snooping(NULL);
645644
domain->iommu_superpage = domain_update_iommu_superpage(domain, NULL);
646645

647646
/*
@@ -4283,7 +4282,6 @@ static int md_domain_init(struct dmar_domain *domain, int guest_width)
42834282
domain->agaw = width_to_agaw(adjust_width);
42844283

42854284
domain->iommu_coherency = false;
4286-
domain->iommu_snooping = false;
42874285
domain->iommu_superpage = 0;
42884286
domain->max_addr = 0;
42894287

@@ -4422,8 +4420,7 @@ static int intel_iommu_map(struct iommu_domain *domain,
44224420
prot |= DMA_PTE_READ;
44234421
if (iommu_prot & IOMMU_WRITE)
44244422
prot |= DMA_PTE_WRITE;
4425-
if (((iommu_prot & IOMMU_CACHE) && dmar_domain->iommu_snooping) ||
4426-
dmar_domain->force_snooping)
4423+
if (dmar_domain->force_snooping)
44274424
prot |= DMA_PTE_SNP;
44284425

44294426
max_addr = iova + size;
@@ -4550,7 +4547,7 @@ static bool intel_iommu_enforce_cache_coherency(struct iommu_domain *domain)
45504547
{
45514548
struct dmar_domain *dmar_domain = to_dmar_domain(domain);
45524549

4553-
if (!dmar_domain->iommu_snooping)
4550+
if (!domain_update_iommu_snooping(NULL))
45544551
return false;
45554552
dmar_domain->force_snooping = true;
45564553
return true;

drivers/vfio/vfio_iommu_type1.c

Lines changed: 19 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -84,8 +84,8 @@ struct vfio_domain {
8484
struct iommu_domain *domain;
8585
struct list_head next;
8686
struct list_head group_list;
87-
int prot; /* IOMMU_CACHE */
88-
bool fgsp; /* Fine-grained super pages */
87+
bool fgsp : 1; /* Fine-grained super pages */
88+
bool enforce_cache_coherency : 1;
8989
};
9090

9191
struct vfio_dma {
@@ -1461,7 +1461,7 @@ static int vfio_iommu_map(struct vfio_iommu *iommu, dma_addr_t iova,
14611461

14621462
list_for_each_entry(d, &iommu->domain_list, next) {
14631463
ret = iommu_map(d->domain, iova, (phys_addr_t)pfn << PAGE_SHIFT,
1464-
npage << PAGE_SHIFT, prot | d->prot);
1464+
npage << PAGE_SHIFT, prot | IOMMU_CACHE);
14651465
if (ret)
14661466
goto unwind;
14671467

@@ -1771,7 +1771,7 @@ static int vfio_iommu_replay(struct vfio_iommu *iommu,
17711771
}
17721772

17731773
ret = iommu_map(domain->domain, iova, phys,
1774-
size, dma->prot | domain->prot);
1774+
size, dma->prot | IOMMU_CACHE);
17751775
if (ret) {
17761776
if (!dma->iommu_mapped) {
17771777
vfio_unpin_pages_remote(dma, iova,
@@ -1859,7 +1859,7 @@ static void vfio_test_domain_fgsp(struct vfio_domain *domain)
18591859
return;
18601860

18611861
ret = iommu_map(domain->domain, 0, page_to_phys(pages), PAGE_SIZE * 2,
1862-
IOMMU_READ | IOMMU_WRITE | domain->prot);
1862+
IOMMU_READ | IOMMU_WRITE | IOMMU_CACHE);
18631863
if (!ret) {
18641864
size_t unmapped = iommu_unmap(domain->domain, 0, PAGE_SIZE);
18651865

@@ -2267,8 +2267,15 @@ static int vfio_iommu_type1_attach_group(void *iommu_data,
22672267
goto out_detach;
22682268
}
22692269

2270-
if (iommu_capable(bus, IOMMU_CAP_CACHE_COHERENCY))
2271-
domain->prot |= IOMMU_CACHE;
2270+
/*
2271+
* If the IOMMU can block non-coherent operations (ie PCIe TLPs with
2272+
* no-snoop set) then VFIO always turns this feature on because on Intel
2273+
* platforms it optimizes KVM to disable wbinvd emulation.
2274+
*/
2275+
if (domain->domain->ops->enforce_cache_coherency)
2276+
domain->enforce_cache_coherency =
2277+
domain->domain->ops->enforce_cache_coherency(
2278+
domain->domain);
22722279

22732280
/*
22742281
* Try to match an existing compatible domain. We don't want to
@@ -2279,7 +2286,8 @@ static int vfio_iommu_type1_attach_group(void *iommu_data,
22792286
*/
22802287
list_for_each_entry(d, &iommu->domain_list, next) {
22812288
if (d->domain->ops == domain->domain->ops &&
2282-
d->prot == domain->prot) {
2289+
d->enforce_cache_coherency ==
2290+
domain->enforce_cache_coherency) {
22832291
iommu_detach_group(domain->domain, group->iommu_group);
22842292
if (!iommu_attach_group(d->domain,
22852293
group->iommu_group)) {
@@ -2611,14 +2619,14 @@ static void vfio_iommu_type1_release(void *iommu_data)
26112619
kfree(iommu);
26122620
}
26132621

2614-
static int vfio_domains_have_iommu_cache(struct vfio_iommu *iommu)
2622+
static int vfio_domains_have_enforce_cache_coherency(struct vfio_iommu *iommu)
26152623
{
26162624
struct vfio_domain *domain;
26172625
int ret = 1;
26182626

26192627
mutex_lock(&iommu->lock);
26202628
list_for_each_entry(domain, &iommu->domain_list, next) {
2621-
if (!(domain->prot & IOMMU_CACHE)) {
2629+
if (!(domain->enforce_cache_coherency)) {
26222630
ret = 0;
26232631
break;
26242632
}
@@ -2641,7 +2649,7 @@ static int vfio_iommu_type1_check_extension(struct vfio_iommu *iommu,
26412649
case VFIO_DMA_CC_IOMMU:
26422650
if (!iommu)
26432651
return 0;
2644-
return vfio_domains_have_iommu_cache(iommu);
2652+
return vfio_domains_have_enforce_cache_coherency(iommu);
26452653
default:
26462654
return 0;
26472655
}

include/linux/intel-iommu.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -539,7 +539,6 @@ struct dmar_domain {
539539

540540
u8 has_iotlb_device: 1;
541541
u8 iommu_coherency: 1; /* indicate coherency of iommu access */
542-
u8 iommu_snooping: 1; /* indicate snooping control feature */
543542
u8 force_snooping : 1; /* Create IOPTEs with snoop control */
544543

545544
struct list_head devices; /* all devices' list */

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