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esposembonzini
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kvm: svm: Add IA32_FLUSH_CMD guest support
Expose IA32_FLUSH_CMD to the guest if the guest CPUID enumerates support for this MSR. As with IA32_PRED_CMD, permission for unintercepted writes to this MSR will be granted to the guest after the first non-zero write. Signed-off-by: Emanuele Giuseppe Esposito <eesposit@redhat.com> Message-Id: <20230201132905.549148-3-eesposit@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
1 parent a807b78 commit 723d5fb

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Lines changed: 30 additions & 13 deletions

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arch/x86/kvm/svm/svm.c

Lines changed: 30 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -2869,6 +2869,28 @@ static int svm_set_vm_cr(struct kvm_vcpu *vcpu, u64 data)
28692869
return 0;
28702870
}
28712871

2872+
static int svm_set_msr_ia32_cmd(struct kvm_vcpu *vcpu, struct msr_data *msr,
2873+
bool guest_has_feat, u64 cmd,
2874+
int x86_feature_bit)
2875+
{
2876+
struct vcpu_svm *svm = to_svm(vcpu);
2877+
2878+
if (!msr->host_initiated && !guest_has_feat)
2879+
return 1;
2880+
2881+
if (!(msr->data & ~cmd))
2882+
return 1;
2883+
if (!boot_cpu_has(x86_feature_bit))
2884+
return 1;
2885+
if (!msr->data)
2886+
return 0;
2887+
2888+
wrmsrl(msr->index, cmd);
2889+
set_msr_interception(vcpu, svm->msrpm, msr->index, 0, 1);
2890+
2891+
return 0;
2892+
}
2893+
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static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
28732895
{
28742896
struct vcpu_svm *svm = to_svm(vcpu);
@@ -2943,19 +2965,14 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
29432965
set_msr_interception(vcpu, svm->msrpm, MSR_IA32_SPEC_CTRL, 1, 1);
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break;
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case MSR_IA32_PRED_CMD:
2946-
if (!msr->host_initiated &&
2947-
!guest_has_pred_cmd_msr(vcpu))
2948-
return 1;
2949-
2950-
if (data & ~PRED_CMD_IBPB)
2951-
return 1;
2952-
if (!boot_cpu_has(X86_FEATURE_IBPB))
2953-
return 1;
2954-
if (!data)
2955-
break;
2956-
2957-
wrmsrl(MSR_IA32_PRED_CMD, PRED_CMD_IBPB);
2958-
set_msr_interception(vcpu, svm->msrpm, MSR_IA32_PRED_CMD, 0, 1);
2968+
r = svm_set_msr_ia32_cmd(vcpu, msr,
2969+
guest_has_pred_cmd_msr(vcpu),
2970+
PRED_CMD_IBPB, X86_FEATURE_IBPB);
2971+
break;
2972+
case MSR_IA32_FLUSH_CMD:
2973+
r = svm_set_msr_ia32_cmd(vcpu, msr,
2974+
guest_cpuid_has(vcpu, X86_FEATURE_FLUSH_L1D),
2975+
L1D_FLUSH, X86_FEATURE_FLUSH_L1D);
29592976
break;
29602977
case MSR_AMD64_VIRT_SPEC_CTRL:
29612978
if (!msr->host_initiated &&

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