Skip to content

Commit 727a400

Browse files
Benjamin Gaignardmchehab
authored andcommitted
media: verisilicon: Add Rockchip AV1 decoder
Implement AV1 stateless decoder for rockchip VPU981. It decode 8 and 10 bits AV1 bitstreams. AV1 scaling feature is done by the postprocessor. Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com> Reviewed-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
1 parent c0d0e57 commit 727a400

4 files changed

Lines changed: 2566 additions & 2 deletions

File tree

drivers/media/platform/verisilicon/Makefile

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@ hantro-vpu-y += \
1818
rockchip_vpu2_hw_h264_dec.o \
1919
rockchip_vpu2_hw_mpeg2_dec.o \
2020
rockchip_vpu2_hw_vp8_dec.o \
21+
rockchip_vpu981_hw_av1_dec.o \
2122
rockchip_av1_entropymode.o \
2223
hantro_jpeg.o \
2324
hantro_h264.o \

drivers/media/platform/verisilicon/hantro_hw.h

Lines changed: 66 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,8 @@
3737

3838
#define NUM_REF_PICTURES (V4L2_HEVC_DPB_ENTRIES_NUM_MAX + 1)
3939

40+
#define AV1_MAX_FRAME_BUF_COUNT (V4L2_AV1_TOTAL_REFS_PER_FRAME + 1)
41+
4042
struct hantro_dev;
4143
struct hantro_ctx;
4244
struct hantro_buf;
@@ -250,23 +252,81 @@ struct hantro_vp9_dec_hw_ctx {
250252
};
251253

252254
/**
253-
* hantro_av1_dec_hw_ctx
255+
* struct hantro_av1_dec_ctrls
256+
* @sequence: AV1 Sequence
257+
* @tile_group_entry: AV1 Tile Group entry
258+
* @frame: AV1 Frame Header OBU
259+
* @film_grain: AV1 Film Grain
260+
*/
261+
struct hantro_av1_dec_ctrls {
262+
const struct v4l2_ctrl_av1_sequence *sequence;
263+
const struct v4l2_ctrl_av1_tile_group_entry *tile_group_entry;
264+
const struct v4l2_ctrl_av1_frame *frame;
265+
const struct v4l2_ctrl_av1_film_grain *film_grain;
266+
};
267+
268+
struct hantro_av1_frame_ref {
269+
int width;
270+
int height;
271+
int mi_cols;
272+
int mi_rows;
273+
u64 timestamp;
274+
enum v4l2_av1_frame_type frame_type;
275+
bool used;
276+
u32 order_hint;
277+
u32 order_hints[V4L2_AV1_TOTAL_REFS_PER_FRAME];
278+
struct vb2_v4l2_buffer *vb2_ref;
279+
};
280+
281+
/**
282+
* struct hantro_av1_dec_hw_ctx
283+
* @db_data_col: db tile col data buffer
284+
* @db_ctrl_col: db tile col ctrl buffer
285+
* @cdef_col: cdef tile col buffer
286+
* @sr_col: sr tile col buffer
287+
* @lr_col: lr tile col buffer
288+
* @global_model: global model buffer
289+
* @tile_info: tile info buffer
290+
* @segment: segmentation info buffer
291+
* @prob_tbl: probability table
292+
* @prob_tbl_out: probability table output
293+
* @tile_buf: tile buffer
294+
* @ctrls: V4L2 controls attached to a run
295+
* @frame_refs: reference frames info slots
296+
* @ref_frame_sign_bias: array of sign bias
297+
* @num_tile_cols_allocated: number of allocated tiles
254298
* @cdfs: current probabilities structure
255299
* @cdfs_ndvc: current mv probabilities structure
256300
* @default_cdfs: default probabilities structure
257301
* @default_cdfs_ndvc: default mv probabilties structure
258302
* @cdfs_last: stored probabilities structures
259303
* @cdfs_last_ndvc: stored mv probabilities structures
304+
* @current_frame_index: index of the current in frame_refs array
260305
*/
261306
struct hantro_av1_dec_hw_ctx {
307+
struct hantro_aux_buf db_data_col;
308+
struct hantro_aux_buf db_ctrl_col;
309+
struct hantro_aux_buf cdef_col;
310+
struct hantro_aux_buf sr_col;
311+
struct hantro_aux_buf lr_col;
312+
struct hantro_aux_buf global_model;
313+
struct hantro_aux_buf tile_info;
314+
struct hantro_aux_buf segment;
315+
struct hantro_aux_buf prob_tbl;
316+
struct hantro_aux_buf prob_tbl_out;
317+
struct hantro_aux_buf tile_buf;
318+
struct hantro_av1_dec_ctrls ctrls;
319+
struct hantro_av1_frame_ref frame_refs[AV1_MAX_FRAME_BUF_COUNT];
320+
u32 ref_frame_sign_bias[V4L2_AV1_TOTAL_REFS_PER_FRAME];
321+
unsigned int num_tile_cols_allocated;
262322
struct av1cdfs *cdfs;
263323
struct mvcdfs *cdfs_ndvc;
264324
struct av1cdfs default_cdfs;
265325
struct mvcdfs default_cdfs_ndvc;
266326
struct av1cdfs cdfs_last[NUM_REF_FRAMES];
267327
struct mvcdfs cdfs_last_ndvc[NUM_REF_FRAMES];
328+
int current_frame_index;
268329
};
269-
270330
/**
271331
* struct hantro_postproc_ctx
272332
*
@@ -381,6 +441,10 @@ void hantro_hevc_ref_init(struct hantro_ctx *ctx);
381441
dma_addr_t hantro_hevc_get_ref_buf(struct hantro_ctx *ctx, s32 poc);
382442
int hantro_hevc_add_ref_buf(struct hantro_ctx *ctx, int poc, dma_addr_t addr);
383443

444+
int rockchip_vpu981_av1_dec_init(struct hantro_ctx *ctx);
445+
void rockchip_vpu981_av1_dec_exit(struct hantro_ctx *ctx);
446+
int rockchip_vpu981_av1_dec_run(struct hantro_ctx *ctx);
447+
void rockchip_vpu981_av1_dec_done(struct hantro_ctx *ctx);
384448

385449
static inline unsigned short hantro_vp9_num_sbs(unsigned short dimension)
386450
{

0 commit comments

Comments
 (0)