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kliteynSaeed Mahameed
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net/mlx5: DR, Calculate sync threshold of each pool according to its type
When certain ICM chunk is no longer needed, it needs to be freed. Fully freeing ICM memory involves issuing FW SYNC_STEERING command. This is very time consuming, and it is impractical to do it for every freed chunk. Instead, we manage these 'freed' chunks in hot list (list of chunks that are not required by SW any more, but HW might still access them). When size of the hot list reaches certain threshold, we purge it and issue SYNC_STEERING FW command. There is one threshold for all the different ICM types, which is not optimal, as different ICM types require different approach: STEs pool is very large, and it is very 'dynamic' in its nature, so letting hot list to become too large will result in a significant perf hiccup when purging the hot list. Modify action is much smaller and less dynamic, so we can let the hot list to grow to almost the size of the whole pool. This patch fixes this problem: instead of having same hot memory threshold for all the pools, sync operation will be triggered in accordance with the ICM type. Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
1 parent 0750560 commit 72b2cff

1 file changed

Lines changed: 18 additions & 15 deletions

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drivers/net/ethernet/mellanox/mlx5/core/steering/dr_icm_pool.c

Lines changed: 18 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,9 @@
44
#include "dr_types.h"
55

66
#define DR_ICM_MODIFY_HDR_ALIGN_BASE 64
7-
#define DR_ICM_POOL_HOT_MEMORY_FRACTION 4
7+
#define DR_ICM_POOL_STE_HOT_MEM_PERCENT 25
8+
#define DR_ICM_POOL_MODIFY_HDR_PTRN_HOT_MEM_PERCENT 50
9+
#define DR_ICM_POOL_MODIFY_ACTION_HOT_MEM_PERCENT 90
810

911
struct mlx5dr_icm_hot_chunk {
1012
struct mlx5dr_icm_buddy_mem *buddy_mem;
@@ -29,6 +31,8 @@ struct mlx5dr_icm_pool {
2931
struct mlx5dr_icm_hot_chunk *hot_chunks_arr;
3032
u32 hot_chunks_num;
3133
u64 hot_memory_size;
34+
/* hot memory size threshold for triggering sync */
35+
u64 th;
3236
};
3337

3438
struct mlx5dr_icm_dm {
@@ -330,15 +334,7 @@ dr_icm_chunk_init(struct mlx5dr_icm_chunk *chunk,
330334

331335
static bool dr_icm_pool_is_sync_required(struct mlx5dr_icm_pool *pool)
332336
{
333-
int allow_hot_size;
334-
335-
/* sync when hot memory reaches a certain fraction of the pool size */
336-
allow_hot_size =
337-
mlx5dr_icm_pool_chunk_size_to_byte(pool->max_log_chunk_sz,
338-
pool->icm_type) /
339-
DR_ICM_POOL_HOT_MEMORY_FRACTION;
340-
341-
return pool->hot_memory_size > allow_hot_size;
337+
return pool->hot_memory_size > pool->th;
342338
}
343339

344340
static void dr_icm_pool_clear_hot_chunks_arr(struct mlx5dr_icm_pool *pool)
@@ -503,8 +499,9 @@ void mlx5dr_icm_pool_free_htbl(struct mlx5dr_icm_pool *pool, struct mlx5dr_ste_h
503499
struct mlx5dr_icm_pool *mlx5dr_icm_pool_create(struct mlx5dr_domain *dmn,
504500
enum mlx5dr_icm_type icm_type)
505501
{
506-
u32 num_of_chunks, entry_size, max_hot_size;
502+
u32 num_of_chunks, entry_size;
507503
struct mlx5dr_icm_pool *pool;
504+
u32 max_hot_size = 0;
508505

509506
pool = kvzalloc(sizeof(*pool), GFP_KERNEL);
510507
if (!pool)
@@ -520,24 +517,30 @@ struct mlx5dr_icm_pool *mlx5dr_icm_pool_create(struct mlx5dr_domain *dmn,
520517
switch (icm_type) {
521518
case DR_ICM_TYPE_STE:
522519
pool->max_log_chunk_sz = dmn->info.max_log_sw_icm_sz;
520+
max_hot_size = mlx5dr_icm_pool_chunk_size_to_byte(pool->max_log_chunk_sz,
521+
pool->icm_type) *
522+
DR_ICM_POOL_STE_HOT_MEM_PERCENT / 100;
523523
break;
524524
case DR_ICM_TYPE_MODIFY_ACTION:
525525
pool->max_log_chunk_sz = dmn->info.max_log_action_icm_sz;
526+
max_hot_size = mlx5dr_icm_pool_chunk_size_to_byte(pool->max_log_chunk_sz,
527+
pool->icm_type) *
528+
DR_ICM_POOL_MODIFY_ACTION_HOT_MEM_PERCENT / 100;
526529
break;
527530
case DR_ICM_TYPE_MODIFY_HDR_PTRN:
528531
pool->max_log_chunk_sz = dmn->info.max_log_modify_hdr_pattern_icm_sz;
532+
max_hot_size = mlx5dr_icm_pool_chunk_size_to_byte(pool->max_log_chunk_sz,
533+
pool->icm_type) *
534+
DR_ICM_POOL_MODIFY_HDR_PTRN_HOT_MEM_PERCENT / 100;
529535
break;
530536
default:
531537
WARN_ON(icm_type);
532538
}
533539

534540
entry_size = mlx5dr_icm_pool_dm_type_to_entry_size(pool->icm_type);
535541

536-
max_hot_size = mlx5dr_icm_pool_chunk_size_to_byte(pool->max_log_chunk_sz,
537-
pool->icm_type) /
538-
DR_ICM_POOL_HOT_MEMORY_FRACTION;
539-
540542
num_of_chunks = DIV_ROUND_UP(max_hot_size, entry_size) + 1;
543+
pool->th = max_hot_size;
541544

542545
pool->hot_chunks_arr = kvcalloc(num_of_chunks,
543546
sizeof(struct mlx5dr_icm_hot_chunk),

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