|
18 | 18 | # |
19 | 19 | # By convention, a blank line in a cell means "same as the preceding line". |
20 | 20 | # |
| 21 | +# Note that the syntactic representation does not always match the sets and |
| 22 | +# relations in linux-kernel.cat, due to redefinitions in linux-kernel.bell and |
| 23 | +# lock.cat. For example, the po link between LKR and LKW is upgraded to an rmw |
| 24 | +# link, and W[ACQUIRE] are not included in the Acquire set. |
| 25 | +# |
21 | 26 | # Disclaimer. The table includes representations of "add" and "and" operations; |
22 | 27 | # corresponding/identical representations of "sub", "inc", "dec" and "or", "xor", |
23 | 28 | # "andnot" operations are omitted. |
|
27 | 32 | ------------------------------------------------------------------------------ |
28 | 33 | | Non-RMW ops | | |
29 | 34 | ------------------------------------------------------------------------------ |
30 | | - | READ_ONCE | R[once] | |
| 35 | + | READ_ONCE | R[ONCE] | |
31 | 36 | | atomic_read | | |
32 | | - | WRITE_ONCE | W[once] | |
| 37 | + | WRITE_ONCE | W[ONCE] | |
33 | 38 | | atomic_set | | |
34 | | - | smp_load_acquire | R[acquire] | |
| 39 | + | smp_load_acquire | R[ACQUIRE] | |
35 | 40 | | atomic_read_acquire | | |
36 | | - | smp_store_release | W[release] | |
| 41 | + | smp_store_release | W[RELEASE] | |
37 | 42 | | atomic_set_release | | |
38 | | - | smp_store_mb | W[once] ->po F[mb] | |
39 | | - | smp_mb | F[mb] | |
| 43 | + | smp_store_mb | W[ONCE] ->po F[MB] | |
| 44 | + | smp_mb | F[MB] | |
40 | 45 | | smp_rmb | F[rmb] | |
41 | 46 | | smp_wmb | F[wmb] | |
42 | 47 | | smp_mb__before_atomic | F[before-atomic] | |
|
49 | 54 | | rcu_read_lock | F[rcu-lock] | |
50 | 55 | | rcu_read_unlock | F[rcu-unlock] | |
51 | 56 | | synchronize_rcu | F[sync-rcu] | |
52 | | - | rcu_dereference | R[once] | |
53 | | - | rcu_assign_pointer | W[release] | |
| 57 | + | rcu_dereference | R[ONCE] | |
| 58 | + | rcu_assign_pointer | W[RELEASE] | |
54 | 59 | | srcu_read_lock | R[srcu-lock] | |
55 | 60 | | srcu_down_read | | |
56 | 61 | | srcu_read_unlock | W[srcu-unlock] | |
|
60 | 65 | ------------------------------------------------------------------------------ |
61 | 66 | | RMW ops w/o return value | | |
62 | 67 | ------------------------------------------------------------------------------ |
63 | | - | atomic_add | R*[noreturn] ->rmw W*[once] | |
| 68 | + | atomic_add | R*[NORETURN] ->rmw W*[NORETURN] | |
64 | 69 | | atomic_and | | |
65 | 70 | | spin_lock | LKR ->po LKW | |
66 | 71 | ------------------------------------------------------------------------------ |
67 | 72 | | RMW ops w/ return value | | |
68 | 73 | ------------------------------------------------------------------------------ |
69 | | - | atomic_add_return | F[mb] ->po R*[once] | |
70 | | - | | ->rmw W*[once] ->po F[mb] | |
| 74 | + | atomic_add_return | R*[MB] ->rmw W*[MB] | |
71 | 75 | | atomic_fetch_add | | |
72 | 76 | | atomic_fetch_and | | |
73 | 77 | | atomic_xchg | | |
74 | 78 | | xchg | | |
75 | 79 | | atomic_add_negative | | |
76 | | - | atomic_add_return_relaxed | R*[once] ->rmw W*[once] | |
| 80 | + | atomic_add_return_relaxed | R*[ONCE] ->rmw W*[ONCE] | |
77 | 81 | | atomic_fetch_add_relaxed | | |
78 | 82 | | atomic_fetch_and_relaxed | | |
79 | 83 | | atomic_xchg_relaxed | | |
80 | 84 | | xchg_relaxed | | |
81 | 85 | | atomic_add_negative_relaxed | | |
82 | | - | atomic_add_return_acquire | R*[acquire] ->rmw W*[once] | |
| 86 | + | atomic_add_return_acquire | R*[ACQUIRE] ->rmw W*[ACQUIRE] | |
83 | 87 | | atomic_fetch_add_acquire | | |
84 | 88 | | atomic_fetch_and_acquire | | |
85 | 89 | | atomic_xchg_acquire | | |
86 | 90 | | xchg_acquire | | |
87 | 91 | | atomic_add_negative_acquire | | |
88 | | - | atomic_add_return_release | R*[once] ->rmw W*[release] | |
| 92 | + | atomic_add_return_release | R*[RELEASE] ->rmw W*[RELEASE] | |
89 | 93 | | atomic_fetch_add_release | | |
90 | 94 | | atomic_fetch_and_release | | |
91 | 95 | | atomic_xchg_release | | |
|
94 | 98 | ------------------------------------------------------------------------------ |
95 | 99 | | Conditional RMW ops | | |
96 | 100 | ------------------------------------------------------------------------------ |
97 | | - | atomic_cmpxchg | On success: F[mb] ->po R*[once] | |
98 | | - | | ->rmw W*[once] ->po F[mb] | |
99 | | - | | On failure: R*[once] | |
| 101 | + | atomic_cmpxchg | On success: R*[MB] ->rmw W*[MB] | |
| 102 | + | | On failure: R*[MB] | |
100 | 103 | | cmpxchg | | |
101 | 104 | | atomic_add_unless | | |
102 | | - | atomic_cmpxchg_relaxed | On success: R*[once] ->rmw W*[once] | |
103 | | - | | On failure: R*[once] | |
104 | | - | atomic_cmpxchg_acquire | On success: R*[acquire] ->rmw W*[once] | |
105 | | - | | On failure: R*[once] | |
106 | | - | atomic_cmpxchg_release | On success: R*[once] ->rmw W*[release] | |
107 | | - | | On failure: R*[once] | |
| 105 | + | atomic_cmpxchg_relaxed | On success: R*[ONCE] ->rmw W*[ONCE] | |
| 106 | + | | On failure: R*[ONCE] | |
| 107 | + | atomic_cmpxchg_acquire | On success: R*[ACQUIRE] ->rmw W*[ACQUIRE] | |
| 108 | + | | On failure: R*[ACQUIRE] | |
| 109 | + | atomic_cmpxchg_release | On success: R*[RELEASE] ->rmw W*[RELEASE] | |
| 110 | + | | On failure: R*[RELEASE] | |
108 | 111 | | spin_trylock | On success: LKR ->po LKW | |
109 | 112 | | | On failure: LF | |
110 | 113 | ------------------------------------------------------------------------------ |
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