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cxl: Rename 'uport' to 'uport_dev'
For symmetry with the recent rename of ->dport_dev for a 'struct cxl_dport', add the "_dev" suffix to the ->uport property of a 'struct cxl_port'. These devices represent the downstream-port-device and upstream-port-device respectively in the CXL/PCIe topology. Signed-off-by: Terry Bowman <terry.bowman@amd.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/20230622205523.85375-6-terry.bowman@amd.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
1 parent 227db57 commit 7481653

9 files changed

Lines changed: 86 additions & 78 deletions

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‎drivers/cxl/core/pci.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -67,7 +67,7 @@ static int match_add_dports(struct pci_dev *pdev, void *data)
6767

6868
/**
6969
* devm_cxl_port_enumerate_dports - enumerate downstream ports of the upstream port
70-
* @port: cxl_port whose ->uport is the upstream of dports to be enumerated
70+
* @port: cxl_port whose ->uport_dev is the upstream of dports to be enumerated
7171
*
7272
* Returns a positive number of dports enumerated or a negative error
7373
* code.
@@ -622,7 +622,7 @@ static int cxl_cdat_read_table(struct device *dev,
622622
*/
623623
void read_cdat_data(struct cxl_port *port)
624624
{
625-
struct cxl_memdev *cxlmd = to_cxl_memdev(port->uport);
625+
struct cxl_memdev *cxlmd = to_cxl_memdev(port->uport_dev);
626626
struct device *host = cxlmd->dev.parent;
627627
struct device *dev = &port->dev;
628628
struct pci_doe_mb *cdat_doe;

‎drivers/cxl/core/port.c‎

Lines changed: 33 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -561,9 +561,9 @@ static void unregister_port(void *_port)
561561
* unregistered while holding their parent port lock.
562562
*/
563563
if (!parent)
564-
lock_dev = port->uport;
564+
lock_dev = port->uport_dev;
565565
else if (is_cxl_root(parent))
566-
lock_dev = parent->uport;
566+
lock_dev = parent->uport_dev;
567567
else
568568
lock_dev = &parent->dev;
569569

@@ -583,7 +583,8 @@ static int devm_cxl_link_uport(struct device *host, struct cxl_port *port)
583583
{
584584
int rc;
585585

586-
rc = sysfs_create_link(&port->dev.kobj, &port->uport->kobj, "uport");
586+
rc = sysfs_create_link(&port->dev.kobj, &port->uport_dev->kobj,
587+
"uport");
587588
if (rc)
588589
return rc;
589590
return devm_add_action_or_reset(host, cxl_unlink_uport, port);
@@ -614,7 +615,7 @@ static int devm_cxl_link_parent_dport(struct device *host,
614615

615616
static struct lock_class_key cxl_port_key;
616617

617-
static struct cxl_port *cxl_port_alloc(struct device *uport,
618+
static struct cxl_port *cxl_port_alloc(struct device *uport_dev,
618619
resource_size_t component_reg_phys,
619620
struct cxl_dport *parent_dport)
620621
{
@@ -630,7 +631,7 @@ static struct cxl_port *cxl_port_alloc(struct device *uport,
630631
if (rc < 0)
631632
goto err;
632633
port->id = rc;
633-
port->uport = uport;
634+
port->uport_dev = uport_dev;
634635

635636
/*
636637
* The top-level cxl_port "cxl_root" does not have a cxl_port as
@@ -660,10 +661,11 @@ static struct cxl_port *cxl_port_alloc(struct device *uport,
660661
else if (parent_dport->rch)
661662
port->host_bridge = parent_dport->dport_dev;
662663
else
663-
port->host_bridge = iter->uport;
664-
dev_dbg(uport, "host-bridge: %s\n", dev_name(port->host_bridge));
664+
port->host_bridge = iter->uport_dev;
665+
dev_dbg(uport_dev, "host-bridge: %s\n",
666+
dev_name(port->host_bridge));
665667
} else
666-
dev->parent = uport;
668+
dev->parent = uport_dev;
667669

668670
port->component_reg_phys = component_reg_phys;
669671
ida_init(&port->decoder_ida);
@@ -687,20 +689,20 @@ static struct cxl_port *cxl_port_alloc(struct device *uport,
687689
}
688690

689691
static struct cxl_port *__devm_cxl_add_port(struct device *host,
690-
struct device *uport,
692+
struct device *uport_dev,
691693
resource_size_t component_reg_phys,
692694
struct cxl_dport *parent_dport)
693695
{
694696
struct cxl_port *port;
695697
struct device *dev;
696698
int rc;
697699

698-
port = cxl_port_alloc(uport, component_reg_phys, parent_dport);
700+
port = cxl_port_alloc(uport_dev, component_reg_phys, parent_dport);
699701
if (IS_ERR(port))
700702
return port;
701703

702704
dev = &port->dev;
703-
if (is_cxl_memdev(uport))
705+
if (is_cxl_memdev(uport_dev))
704706
rc = dev_set_name(dev, "endpoint%d", port->id);
705707
else if (parent_dport)
706708
rc = dev_set_name(dev, "port%d", port->id);
@@ -735,28 +737,29 @@ static struct cxl_port *__devm_cxl_add_port(struct device *host,
735737
/**
736738
* devm_cxl_add_port - register a cxl_port in CXL memory decode hierarchy
737739
* @host: host device for devm operations
738-
* @uport: "physical" device implementing this upstream port
740+
* @uport_dev: "physical" device implementing this upstream port
739741
* @component_reg_phys: (optional) for configurable cxl_port instances
740742
* @parent_dport: next hop up in the CXL memory decode hierarchy
741743
*/
742-
struct cxl_port *devm_cxl_add_port(struct device *host, struct device *uport,
744+
struct cxl_port *devm_cxl_add_port(struct device *host,
745+
struct device *uport_dev,
743746
resource_size_t component_reg_phys,
744747
struct cxl_dport *parent_dport)
745748
{
746749
struct cxl_port *port, *parent_port;
747750

748-
port = __devm_cxl_add_port(host, uport, component_reg_phys,
751+
port = __devm_cxl_add_port(host, uport_dev, component_reg_phys,
749752
parent_dport);
750753

751754
parent_port = parent_dport ? parent_dport->port : NULL;
752755
if (IS_ERR(port)) {
753-
dev_dbg(uport, "Failed to add%s%s%s: %ld\n",
756+
dev_dbg(uport_dev, "Failed to add%s%s%s: %ld\n",
754757
parent_port ? " port to " : "",
755758
parent_port ? dev_name(&parent_port->dev) : "",
756759
parent_port ? "" : " root port",
757760
PTR_ERR(port));
758761
} else {
759-
dev_dbg(uport, "%s added%s%s%s\n",
762+
dev_dbg(uport_dev, "%s added%s%s%s\n",
760763
dev_name(&port->dev),
761764
parent_port ? " to " : "",
762765
parent_port ? dev_name(&parent_port->dev) : "",
@@ -773,33 +776,34 @@ struct pci_bus *cxl_port_to_pci_bus(struct cxl_port *port)
773776
if (is_cxl_root(port))
774777
return NULL;
775778

776-
if (dev_is_pci(port->uport)) {
777-
struct pci_dev *pdev = to_pci_dev(port->uport);
779+
if (dev_is_pci(port->uport_dev)) {
780+
struct pci_dev *pdev = to_pci_dev(port->uport_dev);
778781

779782
return pdev->subordinate;
780783
}
781784

782-
return xa_load(&cxl_root_buses, (unsigned long)port->uport);
785+
return xa_load(&cxl_root_buses, (unsigned long)port->uport_dev);
783786
}
784787
EXPORT_SYMBOL_NS_GPL(cxl_port_to_pci_bus, CXL);
785788

786-
static void unregister_pci_bus(void *uport)
789+
static void unregister_pci_bus(void *uport_dev)
787790
{
788-
xa_erase(&cxl_root_buses, (unsigned long)uport);
791+
xa_erase(&cxl_root_buses, (unsigned long)uport_dev);
789792
}
790793

791-
int devm_cxl_register_pci_bus(struct device *host, struct device *uport,
794+
int devm_cxl_register_pci_bus(struct device *host, struct device *uport_dev,
792795
struct pci_bus *bus)
793796
{
794797
int rc;
795798

796-
if (dev_is_pci(uport))
799+
if (dev_is_pci(uport_dev))
797800
return -EINVAL;
798801

799-
rc = xa_insert(&cxl_root_buses, (unsigned long)uport, bus, GFP_KERNEL);
802+
rc = xa_insert(&cxl_root_buses, (unsigned long)uport_dev, bus,
803+
GFP_KERNEL);
800804
if (rc)
801805
return rc;
802-
return devm_add_action_or_reset(host, unregister_pci_bus, uport);
806+
return devm_add_action_or_reset(host, unregister_pci_bus, uport_dev);
803807
}
804808
EXPORT_SYMBOL_NS_GPL(devm_cxl_register_pci_bus, CXL);
805809

@@ -920,7 +924,7 @@ __devm_cxl_add_dport(struct cxl_port *port, struct device *dport_dev,
920924
int rc;
921925

922926
if (is_cxl_root(port))
923-
host = port->uport;
927+
host = port->uport_dev;
924928
else
925929
host = &port->dev;
926930

@@ -1374,7 +1378,7 @@ static int add_port_attach_ep(struct cxl_memdev *cxlmd,
13741378
rc = PTR_ERR(port);
13751379
else {
13761380
dev_dbg(&cxlmd->dev, "add to new port %s:%s\n",
1377-
dev_name(&port->dev), dev_name(port->uport));
1381+
dev_name(&port->dev), dev_name(port->uport_dev));
13781382
rc = cxl_add_ep(dport, &cxlmd->dev);
13791383
if (rc == -EBUSY) {
13801384
/*
@@ -1436,7 +1440,8 @@ int devm_cxl_enumerate_ports(struct cxl_memdev *cxlmd)
14361440
if (port) {
14371441
dev_dbg(&cxlmd->dev,
14381442
"found already registered port %s:%s\n",
1439-
dev_name(&port->dev), dev_name(port->uport));
1443+
dev_name(&port->dev),
1444+
dev_name(port->uport_dev));
14401445
rc = cxl_add_ep(dport, &cxlmd->dev);
14411446

14421447
/*

‎drivers/cxl/core/region.c‎

Lines changed: 25 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -906,10 +906,10 @@ static int cxl_port_attach_region(struct cxl_port *port,
906906

907907
dev_dbg(&cxlr->dev,
908908
"%s:%s %s add: %s:%s @ %d next: %s nr_eps: %d nr_targets: %d\n",
909-
dev_name(port->uport), dev_name(&port->dev),
909+
dev_name(port->uport_dev), dev_name(&port->dev),
910910
dev_name(&cxld->dev), dev_name(&cxlmd->dev),
911911
dev_name(&cxled->cxld.dev), pos,
912-
ep ? ep->next ? dev_name(ep->next->uport) :
912+
ep ? ep->next ? dev_name(ep->next->uport_dev) :
913913
dev_name(&cxlmd->dev) :
914914
"none",
915915
cxl_rr->nr_eps, cxl_rr->nr_targets);
@@ -984,7 +984,7 @@ static int check_last_peer(struct cxl_endpoint_decoder *cxled,
984984
*/
985985
if (pos < distance) {
986986
dev_dbg(&cxlr->dev, "%s:%s: cannot host %s:%s at %d\n",
987-
dev_name(port->uport), dev_name(&port->dev),
987+
dev_name(port->uport_dev), dev_name(&port->dev),
988988
dev_name(&cxlmd->dev), dev_name(&cxled->cxld.dev), pos);
989989
return -ENXIO;
990990
}
@@ -994,7 +994,7 @@ static int check_last_peer(struct cxl_endpoint_decoder *cxled,
994994
if (ep->dport != ep_peer->dport) {
995995
dev_dbg(&cxlr->dev,
996996
"%s:%s: %s:%s pos %d mismatched peer %s:%s\n",
997-
dev_name(port->uport), dev_name(&port->dev),
997+
dev_name(port->uport_dev), dev_name(&port->dev),
998998
dev_name(&cxlmd->dev), dev_name(&cxled->cxld.dev), pos,
999999
dev_name(&cxlmd_peer->dev),
10001000
dev_name(&cxled_peer->cxld.dev));
@@ -1026,7 +1026,7 @@ static int cxl_port_setup_targets(struct cxl_port *port,
10261026
*/
10271027
if (!is_power_of_2(cxl_rr->nr_targets)) {
10281028
dev_dbg(&cxlr->dev, "%s:%s: invalid target count %d\n",
1029-
dev_name(port->uport), dev_name(&port->dev),
1029+
dev_name(port->uport_dev), dev_name(&port->dev),
10301030
cxl_rr->nr_targets);
10311031
return -EINVAL;
10321032
}
@@ -1076,15 +1076,15 @@ static int cxl_port_setup_targets(struct cxl_port *port,
10761076
rc = granularity_to_eig(parent_ig, &peig);
10771077
if (rc) {
10781078
dev_dbg(&cxlr->dev, "%s:%s: invalid parent granularity: %d\n",
1079-
dev_name(parent_port->uport),
1079+
dev_name(parent_port->uport_dev),
10801080
dev_name(&parent_port->dev), parent_ig);
10811081
return rc;
10821082
}
10831083

10841084
rc = ways_to_eiw(parent_iw, &peiw);
10851085
if (rc) {
10861086
dev_dbg(&cxlr->dev, "%s:%s: invalid parent interleave: %d\n",
1087-
dev_name(parent_port->uport),
1087+
dev_name(parent_port->uport_dev),
10881088
dev_name(&parent_port->dev), parent_iw);
10891089
return rc;
10901090
}
@@ -1093,7 +1093,7 @@ static int cxl_port_setup_targets(struct cxl_port *port,
10931093
rc = ways_to_eiw(iw, &eiw);
10941094
if (rc) {
10951095
dev_dbg(&cxlr->dev, "%s:%s: invalid port interleave: %d\n",
1096-
dev_name(port->uport), dev_name(&port->dev), iw);
1096+
dev_name(port->uport_dev), dev_name(&port->dev), iw);
10971097
return rc;
10981098
}
10991099

@@ -1113,7 +1113,7 @@ static int cxl_port_setup_targets(struct cxl_port *port,
11131113
rc = eig_to_granularity(eig, &ig);
11141114
if (rc) {
11151115
dev_dbg(&cxlr->dev, "%s:%s: invalid interleave: %d\n",
1116-
dev_name(port->uport), dev_name(&port->dev),
1116+
dev_name(port->uport_dev), dev_name(&port->dev),
11171117
256 << eig);
11181118
return rc;
11191119
}
@@ -1126,11 +1126,11 @@ static int cxl_port_setup_targets(struct cxl_port *port,
11261126
((cxld->flags & CXL_DECODER_F_ENABLE) == 0)) {
11271127
dev_err(&cxlr->dev,
11281128
"%s:%s %s expected iw: %d ig: %d %pr\n",
1129-
dev_name(port->uport), dev_name(&port->dev),
1129+
dev_name(port->uport_dev), dev_name(&port->dev),
11301130
__func__, iw, ig, p->res);
11311131
dev_err(&cxlr->dev,
11321132
"%s:%s %s got iw: %d ig: %d state: %s %#llx:%#llx\n",
1133-
dev_name(port->uport), dev_name(&port->dev),
1133+
dev_name(port->uport_dev), dev_name(&port->dev),
11341134
__func__, cxld->interleave_ways,
11351135
cxld->interleave_granularity,
11361136
(cxld->flags & CXL_DECODER_F_ENABLE) ?
@@ -1147,20 +1147,20 @@ static int cxl_port_setup_targets(struct cxl_port *port,
11471147
.end = p->res->end,
11481148
};
11491149
}
1150-
dev_dbg(&cxlr->dev, "%s:%s iw: %d ig: %d\n", dev_name(port->uport),
1150+
dev_dbg(&cxlr->dev, "%s:%s iw: %d ig: %d\n", dev_name(port->uport_dev),
11511151
dev_name(&port->dev), iw, ig);
11521152
add_target:
11531153
if (cxl_rr->nr_targets_set == cxl_rr->nr_targets) {
11541154
dev_dbg(&cxlr->dev,
11551155
"%s:%s: targets full trying to add %s:%s at %d\n",
1156-
dev_name(port->uport), dev_name(&port->dev),
1156+
dev_name(port->uport_dev), dev_name(&port->dev),
11571157
dev_name(&cxlmd->dev), dev_name(&cxled->cxld.dev), pos);
11581158
return -ENXIO;
11591159
}
11601160
if (test_bit(CXL_REGION_F_AUTO, &cxlr->flags)) {
11611161
if (cxlsd->target[cxl_rr->nr_targets_set] != ep->dport) {
11621162
dev_dbg(&cxlr->dev, "%s:%s: %s expected %s at %d\n",
1163-
dev_name(port->uport), dev_name(&port->dev),
1163+
dev_name(port->uport_dev), dev_name(&port->dev),
11641164
dev_name(&cxlsd->cxld.dev),
11651165
dev_name(ep->dport->dport_dev),
11661166
cxl_rr->nr_targets_set);
@@ -1172,7 +1172,7 @@ static int cxl_port_setup_targets(struct cxl_port *port,
11721172
out_target_set:
11731173
cxl_rr->nr_targets_set += inc;
11741174
dev_dbg(&cxlr->dev, "%s:%s target[%d] = %s for %s:%s @ %d\n",
1175-
dev_name(port->uport), dev_name(&port->dev),
1175+
dev_name(port->uport_dev), dev_name(&port->dev),
11761176
cxl_rr->nr_targets_set - 1, dev_name(ep->dport->dport_dev),
11771177
dev_name(&cxlmd->dev), dev_name(&cxled->cxld.dev), pos);
11781178

@@ -1492,7 +1492,7 @@ static int cmp_decode_pos(const void *a, const void *b)
14921492
if (!dev) {
14931493
struct range *range = &cxled_a->cxld.hpa_range;
14941494

1495-
dev_err(port->uport,
1495+
dev_err(port->uport_dev,
14961496
"failed to find decoder that maps %#llx-%#llx\n",
14971497
range->start, range->end);
14981498
goto err;
@@ -1507,14 +1507,15 @@ static int cmp_decode_pos(const void *a, const void *b)
15071507
put_device(dev);
15081508

15091509
if (a_pos < 0 || b_pos < 0) {
1510-
dev_err(port->uport,
1510+
dev_err(port->uport_dev,
15111511
"failed to find shared decoder for %s and %s\n",
15121512
dev_name(cxlmd_a->dev.parent),
15131513
dev_name(cxlmd_b->dev.parent));
15141514
goto err;
15151515
}
15161516

1517-
dev_dbg(port->uport, "%s comes %s %s\n", dev_name(cxlmd_a->dev.parent),
1517+
dev_dbg(port->uport_dev, "%s comes %s %s\n",
1518+
dev_name(cxlmd_a->dev.parent),
15181519
a_pos - b_pos < 0 ? "before" : "after",
15191520
dev_name(cxlmd_b->dev.parent));
15201521

@@ -2059,11 +2060,11 @@ static struct cxl_region *devm_cxl_add_region(struct cxl_root_decoder *cxlrd,
20592060
if (rc)
20602061
goto err;
20612062

2062-
rc = devm_add_action_or_reset(port->uport, unregister_region, cxlr);
2063+
rc = devm_add_action_or_reset(port->uport_dev, unregister_region, cxlr);
20632064
if (rc)
20642065
return ERR_PTR(rc);
20652066

2066-
dev_dbg(port->uport, "%s: created %s\n",
2067+
dev_dbg(port->uport_dev, "%s: created %s\n",
20672068
dev_name(&cxlrd->cxlsd.cxld.dev), dev_name(dev));
20682069
return cxlr;
20692070

@@ -2191,7 +2192,7 @@ static ssize_t delete_region_store(struct device *dev,
21912192
if (IS_ERR(cxlr))
21922193
return PTR_ERR(cxlr);
21932194

2194-
devm_release_action(port->uport, unregister_region, cxlr);
2195+
devm_release_action(port->uport_dev, unregister_region, cxlr);
21952196
put_device(&cxlr->dev);
21962197

21972198
return len;
@@ -2356,7 +2357,8 @@ int cxl_get_poison_by_endpoint(struct cxl_port *port)
23562357

23572358
rc = device_for_each_child(&port->dev, &ctx, poison_by_decoder);
23582359
if (rc == 1)
2359-
rc = cxl_get_poison_unmapped(to_cxl_memdev(port->uport), &ctx);
2360+
rc = cxl_get_poison_unmapped(to_cxl_memdev(port->uport_dev),
2361+
&ctx);
23602362

23612363
up_read(&cxl_region_rwsem);
23622364
return rc;
@@ -2732,7 +2734,7 @@ static struct cxl_region *construct_region(struct cxl_root_decoder *cxlrd,
27322734

27332735
err:
27342736
up_write(&cxl_region_rwsem);
2735-
devm_release_action(port->uport, unregister_region, cxlr);
2737+
devm_release_action(port->uport_dev, unregister_region, cxlr);
27362738
return ERR_PTR(rc);
27372739
}
27382740

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