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leds: leds-is31fl32xx: Add support for is31fl3236a
Also add an additional and optional control register for setting the output PWM frequency to 22kHz. The default is 3kHz and this option puts the operational frequency outside of the audible range. Signed-off-by: Pawel Zalewski <pzalewski@thegoodpenguin.co.uk> Link: https://lore.kernel.org/r/20250723-leds-is31fl3236a-v6-3-210328058625@thegoodpenguin.co.uk Signed-off-by: Lee Jones <lee@kernel.org>
1 parent 8f5ae30 commit 758e743

1 file changed

Lines changed: 41 additions & 6 deletions

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drivers/leds/leds-is31fl32xx.c

Lines changed: 41 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,8 @@
3232
#define IS31FL3216_CONFIG_SSD_ENABLE BIT(7)
3333
#define IS31FL3216_CONFIG_SSD_DISABLE 0
3434

35+
#define IS31FL32XX_PWM_FREQUENCY_22KHZ 0x01
36+
3537
struct is31fl32xx_priv;
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struct is31fl32xx_led_data {
3739
struct led_classdev cdev;
@@ -53,6 +55,7 @@ struct is31fl32xx_priv {
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* @pwm_update_reg : address of PWM Update register
5456
* @global_control_reg : address of Global Control register (optional)
5557
* @reset_reg : address of Reset register (optional)
58+
* @output_frequency_setting_reg: address of output frequency register (optional)
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* @pwm_register_base : address of first PWM register
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* @pwm_registers_reversed: : true if PWM registers count down instead of up
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* @led_control_register_base : address of first LED control register (optional)
@@ -76,6 +79,7 @@ struct is31fl32xx_chipdef {
7679
u8 pwm_update_reg;
7780
u8 global_control_reg;
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u8 reset_reg;
82+
u8 output_frequency_setting_reg;
7983
u8 pwm_register_base;
8084
bool pwm_registers_reversed;
8185
u8 led_control_register_base;
@@ -90,6 +94,19 @@ static const struct is31fl32xx_chipdef is31fl3236_cdef = {
9094
.pwm_update_reg = 0x25,
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.global_control_reg = 0x4a,
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.reset_reg = 0x4f,
97+
.output_frequency_setting_reg = IS31FL32XX_REG_NONE,
98+
.pwm_register_base = 0x01,
99+
.led_control_register_base = 0x26,
100+
.enable_bits_per_led_control_register = 1,
101+
};
102+
103+
static const struct is31fl32xx_chipdef is31fl3236a_cdef = {
104+
.channels = 36,
105+
.shutdown_reg = 0x00,
106+
.pwm_update_reg = 0x25,
107+
.global_control_reg = 0x4a,
108+
.reset_reg = 0x4f,
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.output_frequency_setting_reg = 0x4b,
93110
.pwm_register_base = 0x01,
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.led_control_register_base = 0x26,
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.enable_bits_per_led_control_register = 1,
@@ -101,6 +118,7 @@ static const struct is31fl32xx_chipdef is31fl3235_cdef = {
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.pwm_update_reg = 0x25,
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.global_control_reg = 0x4a,
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.reset_reg = 0x4f,
121+
.output_frequency_setting_reg = IS31FL32XX_REG_NONE,
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.pwm_register_base = 0x05,
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.led_control_register_base = 0x2a,
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.enable_bits_per_led_control_register = 1,
@@ -112,6 +130,7 @@ static const struct is31fl32xx_chipdef is31fl3218_cdef = {
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.pwm_update_reg = 0x16,
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.global_control_reg = IS31FL32XX_REG_NONE,
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.reset_reg = 0x17,
133+
.output_frequency_setting_reg = IS31FL32XX_REG_NONE,
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.pwm_register_base = 0x01,
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.led_control_register_base = 0x13,
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.enable_bits_per_led_control_register = 6,
@@ -126,6 +145,7 @@ static const struct is31fl32xx_chipdef is31fl3216_cdef = {
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.pwm_update_reg = 0xB0,
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.global_control_reg = IS31FL32XX_REG_NONE,
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.reset_reg = IS31FL32XX_REG_NONE,
148+
.output_frequency_setting_reg = IS31FL32XX_REG_NONE,
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.pwm_register_base = 0x10,
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.pwm_registers_reversed = true,
131151
.led_control_register_base = 0x01,
@@ -363,8 +383,21 @@ static struct is31fl32xx_led_data *is31fl32xx_find_led_data(
363383
static int is31fl32xx_parse_dt(struct device *dev,
364384
struct is31fl32xx_priv *priv)
365385
{
386+
const struct is31fl32xx_chipdef *cdef = priv->cdef;
366387
int ret = 0;
367388

389+
if ((cdef->output_frequency_setting_reg != IS31FL32XX_REG_NONE) &&
390+
of_property_read_bool(dev_of_node(dev), "issi,22khz-pwm")) {
391+
392+
ret = is31fl32xx_write(priv, cdef->output_frequency_setting_reg,
393+
IS31FL32XX_PWM_FREQUENCY_22KHZ);
394+
395+
if (ret) {
396+
dev_err(dev, "Failed to write output PWM frequency register\n");
397+
return ret;
398+
}
399+
}
400+
368401
for_each_available_child_of_node_scoped(dev_of_node(dev), child) {
369402
struct led_init_data init_data = {};
370403
struct is31fl32xx_led_data *led_data =
@@ -404,12 +437,13 @@ static int is31fl32xx_parse_dt(struct device *dev,
404437
}
405438

406439
static const struct of_device_id of_is31fl32xx_match[] = {
407-
{ .compatible = "issi,is31fl3236", .data = &is31fl3236_cdef, },
408-
{ .compatible = "issi,is31fl3235", .data = &is31fl3235_cdef, },
409-
{ .compatible = "issi,is31fl3218", .data = &is31fl3218_cdef, },
410-
{ .compatible = "si-en,sn3218", .data = &is31fl3218_cdef, },
411-
{ .compatible = "issi,is31fl3216", .data = &is31fl3216_cdef, },
412-
{ .compatible = "si-en,sn3216", .data = &is31fl3216_cdef, },
440+
{ .compatible = "issi,is31fl3236", .data = &is31fl3236_cdef, },
441+
{ .compatible = "issi,is31fl3236a", .data = &is31fl3236a_cdef, },
442+
{ .compatible = "issi,is31fl3235", .data = &is31fl3235_cdef, },
443+
{ .compatible = "issi,is31fl3218", .data = &is31fl3218_cdef, },
444+
{ .compatible = "si-en,sn3218", .data = &is31fl3218_cdef, },
445+
{ .compatible = "issi,is31fl3216", .data = &is31fl3216_cdef, },
446+
{ .compatible = "si-en,sn3216", .data = &is31fl3216_cdef, },
413447
{},
414448
};
415449

@@ -466,6 +500,7 @@ static void is31fl32xx_remove(struct i2c_client *client)
466500
*/
467501
static const struct i2c_device_id is31fl32xx_id[] = {
468502
{ "is31fl3236" },
503+
{ "is31fl3236a" },
469504
{ "is31fl3235" },
470505
{ "is31fl3218" },
471506
{ "sn3218" },

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