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Li Maalexdeucher
Li Ma
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alexdeucher
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drm/amd/swsmu: update smu v14_0_0 driver if version and metrics table
Increment the driver if version and add new mems to the mertics table. Signed-off-by: Li Ma <li.ma@amd.com> Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
1 parent 9f7cb03 commit 78825df

4 files changed

Lines changed: 115 additions & 35 deletions

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‎drivers/gpu/drm/amd/include/kgd_pp_interface.h‎

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1085,6 +1085,10 @@ struct gpu_metrics_v3_0 {
10851085
uint16_t average_dram_reads;
10861086
/* time filtered DRAM write bandwidth [MB/sec] */
10871087
uint16_t average_dram_writes;
1088+
/* time filtered IPU read bandwidth [MB/sec] */
1089+
uint16_t average_ipu_reads;
1090+
/* time filtered IPU write bandwidth [MB/sec] */
1091+
uint16_t average_ipu_writes;
10881092

10891093
/* Driver attached timestamp (in ns) */
10901094
uint64_t system_clock_counter;
@@ -1104,6 +1108,8 @@ struct gpu_metrics_v3_0 {
11041108
uint32_t average_all_core_power;
11051109
/* calculated core power [mW] */
11061110
uint16_t average_core_power[16];
1111+
/* time filtered total system power [mW] */
1112+
uint16_t average_sys_power;
11071113
/* maximum IRM defined STAPM power limit [mW] */
11081114
uint16_t stapm_power_limit;
11091115
/* time filtered STAPM power limit [mW] */
@@ -1116,6 +1122,8 @@ struct gpu_metrics_v3_0 {
11161122
uint16_t average_ipuclk_frequency;
11171123
uint16_t average_fclk_frequency;
11181124
uint16_t average_vclk_frequency;
1125+
uint16_t average_uclk_frequency;
1126+
uint16_t average_mpipu_frequency;
11191127

11201128
/* Current clocks */
11211129
/* target core frequency [MHz] */
@@ -1125,6 +1133,15 @@ struct gpu_metrics_v3_0 {
11251133
/* GFXCLK frequency limit enforced on GFX [MHz] */
11261134
uint16_t current_gfx_maxfreq;
11271135

1136+
/* Throttle Residency (ASIC dependent) */
1137+
uint32_t throttle_residency_prochot;
1138+
uint32_t throttle_residency_spl;
1139+
uint32_t throttle_residency_fppt;
1140+
uint32_t throttle_residency_sppt;
1141+
uint32_t throttle_residency_thm_core;
1142+
uint32_t throttle_residency_thm_gfx;
1143+
uint32_t throttle_residency_thm_soc;
1144+
11281145
/* Metrics table alpha filter time constant [us] */
11291146
uint32_t time_filter_alphavalue;
11301147
};

‎drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h‎

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1408,6 +1408,16 @@ typedef enum {
14081408
METRICS_PCIE_WIDTH,
14091409
METRICS_CURR_FANPWM,
14101410
METRICS_CURR_SOCKETPOWER,
1411+
METRICS_AVERAGE_VPECLK,
1412+
METRICS_AVERAGE_IPUCLK,
1413+
METRICS_AVERAGE_MPIPUCLK,
1414+
METRICS_THROTTLER_RESIDENCY_PROCHOT,
1415+
METRICS_THROTTLER_RESIDENCY_SPL,
1416+
METRICS_THROTTLER_RESIDENCY_FPPT,
1417+
METRICS_THROTTLER_RESIDENCY_SPPT,
1418+
METRICS_THROTTLER_RESIDENCY_THM_CORE,
1419+
METRICS_THROTTLER_RESIDENCY_THM_GFX,
1420+
METRICS_THROTTLER_RESIDENCY_THM_SOC,
14111421
} MetricsMember_t;
14121422

14131423
enum smu_cmn2asic_mapping_type {

‎drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu14_driver_if_v14_0_0.h‎

Lines changed: 45 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@
2727
// *** IMPORTANT ***
2828
// SMU TEAM: Always increment the interface version if
2929
// any structure is changed in this file
30-
#define PMFW_DRIVER_IF_VERSION 6
30+
#define PMFW_DRIVER_IF_VERSION 7
3131

3232
typedef struct {
3333
int32_t value;
@@ -150,37 +150,50 @@ typedef struct {
150150
} DpmClocks_t;
151151

152152
typedef struct {
153-
uint16_t CoreFrequency[16]; //Target core frequency [MHz]
154-
uint16_t CorePower[16]; //CAC calculated core power [mW]
155-
uint16_t CoreTemperature[16]; //TSEN measured core temperature [centi-C]
156-
uint16_t GfxTemperature; //TSEN measured GFX temperature [centi-C]
157-
uint16_t SocTemperature; //TSEN measured SOC temperature [centi-C]
158-
uint16_t StapmOpnLimit; //Maximum IRM defined STAPM power limit [mW]
159-
uint16_t StapmCurrentLimit; //Time filtered STAPM power limit [mW]
160-
uint16_t InfrastructureCpuMaxFreq; //CCLK frequency limit enforced on classic cores [MHz]
161-
uint16_t InfrastructureGfxMaxFreq; //GFXCLK frequency limit enforced on GFX [MHz]
162-
uint16_t SkinTemp; //Maximum skin temperature reported by APU and HS2 chassis sensors [centi-C]
163-
uint16_t GfxclkFrequency; //Time filtered target GFXCLK frequency [MHz]
164-
uint16_t FclkFrequency; //Time filtered target FCLK frequency [MHz]
165-
uint16_t GfxActivity; //Time filtered GFX busy % [0-100]
166-
uint16_t SocclkFrequency; //Time filtered target SOCCLK frequency [MHz]
167-
uint16_t VclkFrequency; //Time filtered target VCLK frequency [MHz]
168-
uint16_t VcnActivity; //Time filtered VCN busy % [0-100]
169-
uint16_t VpeclkFrequency; //Time filtered target VPECLK frequency [MHz]
170-
uint16_t IpuclkFrequency; //Time filtered target IPUCLK frequency [MHz]
171-
uint16_t IpuBusy[8]; //Time filtered IPU per-column busy % [0-100]
172-
uint16_t DRAMReads; //Time filtered DRAM read bandwidth [MB/sec]
173-
uint16_t DRAMWrites; //Time filtered DRAM write bandwidth [MB/sec]
174-
uint16_t CoreC0Residency[16]; //Time filtered per-core C0 residency % [0-100]
175-
uint16_t IpuPower; //Time filtered IPU power [mW]
176-
uint32_t ApuPower; //Time filtered APU power [mW]
177-
uint32_t GfxPower; //Time filtered GFX power [mW]
178-
uint32_t dGpuPower; //Time filtered dGPU power [mW]
179-
uint32_t SocketPower; //Time filtered power used for PPT/STAPM [APU+dGPU] [mW]
180-
uint32_t AllCorePower; //Time filtered sum of core power across all cores in the socket [mW]
181-
uint32_t FilterAlphaValue; //Metrics table alpha filter time constant [us]
182-
uint32_t MetricsCounter; //Counter that is incremented on every metrics table update [PM_TIMER cycles]
183-
uint32_t spare[16];
153+
uint16_t CoreFrequency[16]; //Target core frequency [MHz]
154+
uint16_t CorePower[16]; //CAC calculated core power [mW]
155+
uint16_t CoreTemperature[16]; //TSEN measured core temperature [centi-C]
156+
uint16_t GfxTemperature; //TSEN measured GFX temperature [centi-C]
157+
uint16_t SocTemperature; //TSEN measured SOC temperature [centi-C]
158+
uint16_t StapmOpnLimit; //Maximum IRM defined STAPM power limit [mW]
159+
uint16_t StapmCurrentLimit; //Time filtered STAPM power limit [mW]
160+
uint16_t InfrastructureCpuMaxFreq; //CCLK frequency limit enforced on classic cores [MHz]
161+
uint16_t InfrastructureGfxMaxFreq; //GFXCLK frequency limit enforced on GFX [MHz]
162+
uint16_t SkinTemp; //Maximum skin temperature reported by APU and HS2 chassis sensors [centi-C]
163+
uint16_t GfxclkFrequency; //Time filtered target GFXCLK frequency [MHz]
164+
uint16_t FclkFrequency; //Time filtered target FCLK frequency [MHz]
165+
uint16_t GfxActivity; //Time filtered GFX busy % [0-100]
166+
uint16_t SocclkFrequency; //Time filtered target SOCCLK frequency [MHz]
167+
uint16_t VclkFrequency; //Time filtered target VCLK frequency [MHz]
168+
uint16_t VcnActivity; //Time filtered VCN busy % [0-100]
169+
uint16_t VpeclkFrequency; //Time filtered target VPECLK frequency [MHz]
170+
uint16_t IpuclkFrequency; //Time filtered target IPUCLK frequency [MHz]
171+
uint16_t IpuBusy[8]; //Time filtered IPU per-column busy % [0-100]
172+
uint16_t DRAMReads; //Time filtered DRAM read bandwidth [MB/sec]
173+
uint16_t DRAMWrites; //Time filtered DRAM write bandwidth [MB/sec]
174+
uint16_t CoreC0Residency[16]; //Time filtered per-core C0 residency % [0-100]
175+
uint16_t IpuPower; //Time filtered IPU power [mW]
176+
uint32_t ApuPower; //Time filtered APU power [mW]
177+
uint32_t GfxPower; //Time filtered GFX power [mW]
178+
uint32_t dGpuPower; //Time filtered dGPU power [mW]
179+
uint32_t SocketPower; //Time filtered power used for PPT/STAPM [APU+dGPU] [mW]
180+
uint32_t AllCorePower; //Time filtered sum of core power across all cores in the socket [mW]
181+
uint32_t FilterAlphaValue; //Metrics table alpha filter time constant [us]
182+
uint32_t MetricsCounter; //Counter that is incremented on every metrics table update [PM_TIMER cycles]
183+
uint16_t MemclkFrequency; //Time filtered target MEMCLK frequency [MHz]
184+
uint16_t MpipuclkFrequency; //Time filtered target MPIPUCLK frequency [MHz]
185+
uint16_t IpuReads; //Time filtered IPU read bandwidth [MB/sec]
186+
uint16_t IpuWrites; //Time filtered IPU write bandwidth [MB/sec]
187+
uint32_t ThrottleResidency_PROCHOT; //Counter that is incremented on every metrics table update when PROCHOT was engaged [PM_TIMER cycles]
188+
uint32_t ThrottleResidency_SPL; //Counter that is incremented on every metrics table update when SPL was engaged [PM_TIMER cycles]
189+
uint32_t ThrottleResidency_FPPT; //Counter that is incremented on every metrics table update when fast PPT was engaged [PM_TIMER cycles]
190+
uint32_t ThrottleResidency_SPPT; //Counter that is incremented on every metrics table update when slow PPT was engaged [PM_TIMER cycles]
191+
uint32_t ThrottleResidency_THM_CORE; //Counter that is incremented on every metrics table update when CORE thermal throttling was engaged [PM_TIMER cycles]
192+
uint32_t ThrottleResidency_THM_GFX; //Counter that is incremented on every metrics table update when GFX thermal throttling was engaged [PM_TIMER cycles]
193+
uint32_t ThrottleResidency_THM_SOC; //Counter that is incremented on every metrics table update when SOC thermal throttling was engaged [PM_TIMER cycles]
194+
uint16_t Psys; //Time filtered Psys power [mW]
195+
uint16_t spare1;
196+
uint32_t spare[6];
184197
} SmuMetrics_t;
185198

186199
//ISP tile definitions

‎drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_0_ppt.c‎

Lines changed: 43 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -246,11 +246,20 @@ static int smu_v14_0_0_get_smu_metrics_data(struct smu_context *smu,
246246
*value = 0;
247247
break;
248248
case METRICS_AVERAGE_UCLK:
249-
*value = 0;
249+
*value = metrics->MemclkFrequency;
250250
break;
251251
case METRICS_AVERAGE_FCLK:
252252
*value = metrics->FclkFrequency;
253253
break;
254+
case METRICS_AVERAGE_VPECLK:
255+
*value = metrics->VpeclkFrequency;
256+
break;
257+
case METRICS_AVERAGE_IPUCLK:
258+
*value = metrics->IpuclkFrequency;
259+
break;
260+
case METRICS_AVERAGE_MPIPUCLK:
261+
*value = metrics->MpipuclkFrequency;
262+
break;
254263
case METRICS_AVERAGE_GFXACTIVITY:
255264
*value = metrics->GfxActivity / 100;
256265
break;
@@ -270,8 +279,26 @@ static int smu_v14_0_0_get_smu_metrics_data(struct smu_context *smu,
270279
*value = metrics->SocTemperature / 100 *
271280
SMU_TEMPERATURE_UNITS_PER_CENTIGRADES;
272281
break;
273-
case METRICS_THROTTLER_STATUS:
274-
*value = 0;
282+
case METRICS_THROTTLER_RESIDENCY_PROCHOT:
283+
*value = metrics->ThrottleResidency_PROCHOT;
284+
break;
285+
case METRICS_THROTTLER_RESIDENCY_SPL:
286+
*value = metrics->ThrottleResidency_SPL;
287+
break;
288+
case METRICS_THROTTLER_RESIDENCY_FPPT:
289+
*value = metrics->ThrottleResidency_FPPT;
290+
break;
291+
case METRICS_THROTTLER_RESIDENCY_SPPT:
292+
*value = metrics->ThrottleResidency_SPPT;
293+
break;
294+
case METRICS_THROTTLER_RESIDENCY_THM_CORE:
295+
*value = metrics->ThrottleResidency_THM_CORE;
296+
break;
297+
case METRICS_THROTTLER_RESIDENCY_THM_GFX:
298+
*value = metrics->ThrottleResidency_THM_GFX;
299+
break;
300+
case METRICS_THROTTLER_RESIDENCY_THM_SOC:
301+
*value = metrics->ThrottleResidency_THM_SOC;
275302
break;
276303
case METRICS_VOLTAGE_VDDGFX:
277304
*value = 0;
@@ -498,13 +525,16 @@ static ssize_t smu_v14_0_0_get_gpu_metrics(struct smu_context *smu,
498525
sizeof(uint16_t) * 16);
499526
gpu_metrics->average_dram_reads = metrics.DRAMReads;
500527
gpu_metrics->average_dram_writes = metrics.DRAMWrites;
528+
gpu_metrics->average_ipu_reads = metrics.IpuReads;
529+
gpu_metrics->average_ipu_writes = metrics.IpuWrites;
501530

502531
gpu_metrics->average_socket_power = metrics.SocketPower;
503532
gpu_metrics->average_ipu_power = metrics.IpuPower;
504533
gpu_metrics->average_apu_power = metrics.ApuPower;
505534
gpu_metrics->average_gfx_power = metrics.GfxPower;
506535
gpu_metrics->average_dgpu_power = metrics.dGpuPower;
507536
gpu_metrics->average_all_core_power = metrics.AllCorePower;
537+
gpu_metrics->average_sys_power = metrics.Psys;
508538
memcpy(&gpu_metrics->average_core_power[0],
509539
&metrics.CorePower[0],
510540
sizeof(uint16_t) * 16);
@@ -515,13 +545,23 @@ static ssize_t smu_v14_0_0_get_gpu_metrics(struct smu_context *smu,
515545
gpu_metrics->average_fclk_frequency = metrics.FclkFrequency;
516546
gpu_metrics->average_vclk_frequency = metrics.VclkFrequency;
517547
gpu_metrics->average_ipuclk_frequency = metrics.IpuclkFrequency;
548+
gpu_metrics->average_uclk_frequency = metrics.MemclkFrequency;
549+
gpu_metrics->average_mpipu_frequency = metrics.MpipuclkFrequency;
518550

519551
memcpy(&gpu_metrics->current_coreclk[0],
520552
&metrics.CoreFrequency[0],
521553
sizeof(uint16_t) * 16);
522554
gpu_metrics->current_core_maxfreq = metrics.InfrastructureCpuMaxFreq;
523555
gpu_metrics->current_gfx_maxfreq = metrics.InfrastructureGfxMaxFreq;
524556

557+
gpu_metrics->throttle_residency_prochot = metrics.ThrottleResidency_PROCHOT;
558+
gpu_metrics->throttle_residency_spl = metrics.ThrottleResidency_SPL;
559+
gpu_metrics->throttle_residency_fppt = metrics.ThrottleResidency_FPPT;
560+
gpu_metrics->throttle_residency_sppt = metrics.ThrottleResidency_SPPT;
561+
gpu_metrics->throttle_residency_thm_core = metrics.ThrottleResidency_THM_CORE;
562+
gpu_metrics->throttle_residency_thm_gfx = metrics.ThrottleResidency_THM_GFX;
563+
gpu_metrics->throttle_residency_thm_soc = metrics.ThrottleResidency_THM_SOC;
564+
525565
gpu_metrics->time_filter_alphavalue = metrics.FilterAlphaValue;
526566
gpu_metrics->system_clock_counter = ktime_get_boottime_ns();
527567

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