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Ben Skeggsairlied
Ben Skeggs
authored and
airlied
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drm/nouveau/nvdec/tu102-: prepare for GSP-RM
- (temporarily) disable if GSP-RM detected, will be added later - provide empty class list for non-GSP paths - split tu102- from gm107, they will provide host classes later - fixup HW engine instance masks Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230918202149.4343-28-skeggsb@gmail.com
1 parent a6f992a commit 796928c

8 files changed

Lines changed: 55 additions & 12 deletions

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‎drivers/gpu/drm/nouveau/include/nvkm/engine/nvdec.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,5 +12,6 @@ struct nvkm_nvdec {
1212
};
1313

1414
int gm107_nvdec_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_nvdec **);
15+
int tu102_nvdec_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_nvdec **);
1516
int ga102_nvdec_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_nvdec **);
1617
#endif

‎drivers/gpu/drm/nouveau/nvkm/engine/device/base.c‎

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -2426,7 +2426,7 @@ nv162_chipset = {
24262426
.dma = { 0x00000001, gv100_dma_new },
24272427
.fifo = { 0x00000001, tu102_fifo_new },
24282428
.gr = { 0x00000001, tu102_gr_new },
2429-
.nvdec = { 0x00000001, gm107_nvdec_new },
2429+
.nvdec = { 0x00000001, tu102_nvdec_new },
24302430
.nvenc = { 0x00000001, gm107_nvenc_new },
24312431
.sec2 = { 0x00000001, tu102_sec2_new },
24322432
};
@@ -2461,7 +2461,7 @@ nv164_chipset = {
24612461
.dma = { 0x00000001, gv100_dma_new },
24622462
.fifo = { 0x00000001, tu102_fifo_new },
24632463
.gr = { 0x00000001, tu102_gr_new },
2464-
.nvdec = { 0x00000003, gm107_nvdec_new },
2464+
.nvdec = { 0x00000003, tu102_nvdec_new },
24652465
.nvenc = { 0x00000001, gm107_nvenc_new },
24662466
.sec2 = { 0x00000001, tu102_sec2_new },
24672467
};
@@ -2496,7 +2496,7 @@ nv166_chipset = {
24962496
.dma = { 0x00000001, gv100_dma_new },
24972497
.fifo = { 0x00000001, tu102_fifo_new },
24982498
.gr = { 0x00000001, tu102_gr_new },
2499-
.nvdec = { 0x00000007, gm107_nvdec_new },
2499+
.nvdec = { 0x00000007, tu102_nvdec_new },
25002500
.nvenc = { 0x00000001, gm107_nvenc_new },
25012501
.sec2 = { 0x00000001, tu102_sec2_new },
25022502
};
@@ -2531,7 +2531,7 @@ nv167_chipset = {
25312531
.dma = { 0x00000001, gv100_dma_new },
25322532
.fifo = { 0x00000001, tu102_fifo_new },
25332533
.gr = { 0x00000001, tu102_gr_new },
2534-
.nvdec = { 0x00000001, gm107_nvdec_new },
2534+
.nvdec = { 0x00000001, tu102_nvdec_new },
25352535
.nvenc = { 0x00000001, gm107_nvenc_new },
25362536
.sec2 = { 0x00000001, tu102_sec2_new },
25372537
};
@@ -2566,7 +2566,7 @@ nv168_chipset = {
25662566
.dma = { 0x00000001, gv100_dma_new },
25672567
.fifo = { 0x00000001, tu102_fifo_new },
25682568
.gr = { 0x00000001, tu102_gr_new },
2569-
.nvdec = { 0x00000001, gm107_nvdec_new },
2569+
.nvdec = { 0x00000001, tu102_nvdec_new },
25702570
.nvenc = { 0x00000001, gm107_nvenc_new },
25712571
.sec2 = { 0x00000001, tu102_sec2_new },
25722572
};
@@ -2620,7 +2620,7 @@ nv172_chipset = {
26202620
.dma = { 0x00000001, gv100_dma_new },
26212621
.fifo = { 0x00000001, ga102_fifo_new },
26222622
.gr = { 0x00000001, ga102_gr_new },
2623-
.nvdec = { 0x00000001, ga102_nvdec_new },
2623+
.nvdec = { 0x00000003, ga102_nvdec_new },
26242624
.sec2 = { 0x00000001, ga102_sec2_new },
26252625
};
26262626

@@ -2650,7 +2650,7 @@ nv173_chipset = {
26502650
.dma = { 0x00000001, gv100_dma_new },
26512651
.fifo = { 0x00000001, ga102_fifo_new },
26522652
.gr = { 0x00000001, ga102_gr_new },
2653-
.nvdec = { 0x00000001, ga102_nvdec_new },
2653+
.nvdec = { 0x00000003, ga102_nvdec_new },
26542654
.sec2 = { 0x00000001, ga102_sec2_new },
26552655
};
26562656

@@ -2680,7 +2680,7 @@ nv174_chipset = {
26802680
.dma = { 0x00000001, gv100_dma_new },
26812681
.fifo = { 0x00000001, ga102_fifo_new },
26822682
.gr = { 0x00000001, ga102_gr_new },
2683-
.nvdec = { 0x00000001, ga102_nvdec_new },
2683+
.nvdec = { 0x00000003, ga102_nvdec_new },
26842684
.sec2 = { 0x00000001, ga102_sec2_new },
26852685
};
26862686

@@ -2710,7 +2710,7 @@ nv176_chipset = {
27102710
.dma = { 0x00000001, gv100_dma_new },
27112711
.fifo = { 0x00000001, ga102_fifo_new },
27122712
.gr = { 0x00000001, ga102_gr_new },
2713-
.nvdec = { 0x00000001, ga102_nvdec_new },
2713+
.nvdec = { 0x00000003, ga102_nvdec_new },
27142714
.sec2 = { 0x00000001, ga102_sec2_new },
27152715
};
27162716

@@ -2740,7 +2740,7 @@ nv177_chipset = {
27402740
.dma = { 0x00000001, gv100_dma_new },
27412741
.fifo = { 0x00000001, ga102_fifo_new },
27422742
.gr = { 0x00000001, ga102_gr_new },
2743-
.nvdec = { 0x00000001, ga102_nvdec_new },
2743+
.nvdec = { 0x00000003, ga102_nvdec_new },
27442744
.sec2 = { 0x00000001, ga102_sec2_new },
27452745
};
27462746

‎drivers/gpu/drm/nouveau/nvkm/engine/nvdec/Kbuild‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,5 @@
11
# SPDX-License-Identifier: MIT
22
nvkm-y += nvkm/engine/nvdec/base.o
33
nvkm-y += nvkm/engine/nvdec/gm107.o
4+
nvkm-y += nvkm/engine/nvdec/tu102.o
45
nvkm-y += nvkm/engine/nvdec/ga102.o

‎drivers/gpu/drm/nouveau/nvkm/engine/nvdec/base.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,7 @@ nvkm_nvdec_dtor(struct nvkm_engine *engine)
3333
static const struct nvkm_engine_func
3434
nvkm_nvdec = {
3535
.dtor = nvkm_nvdec_dtor,
36+
.sclass = { {} },
3637
};
3738

3839
int
@@ -58,4 +59,4 @@ nvkm_nvdec_new_(const struct nvkm_nvdec_fwif *fwif, struct nvkm_device *device,
5859

5960
return nvkm_falcon_ctor(nvdec->func->flcn, &nvdec->engine.subdev,
6061
nvdec->engine.subdev.name, addr, &nvdec->falcon);
61-
};
62+
}

‎drivers/gpu/drm/nouveau/nvkm/engine/nvdec/ga102.c‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,7 @@
2121
*/
2222
#include "priv.h"
2323

24+
#include <subdev/gsp.h>
2425
#include <subdev/mc.h>
2526
#include <subdev/timer.h>
2627

@@ -57,5 +58,8 @@ int
5758
ga102_nvdec_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
5859
struct nvkm_nvdec **pnvdec)
5960
{
61+
if (nvkm_gsp_rm(device->gsp))
62+
return -ENODEV;
63+
6064
return nvkm_nvdec_new_(ga102_nvdec_fwif, device, type, inst, 0x848000, pnvdec);
6165
}

‎drivers/gpu/drm/nouveau/nvkm/engine/nvdec/gm107.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,7 @@ gm107_nvdec_nofw(struct nvkm_nvdec *nvdec, int ver,
4444
return 0;
4545
}
4646

47-
static const struct nvkm_nvdec_fwif
47+
const struct nvkm_nvdec_fwif
4848
gm107_nvdec_fwif[] = {
4949
{ -1, gm107_nvdec_nofw, &gm107_nvdec },
5050
{}

‎drivers/gpu/drm/nouveau/nvkm/engine/nvdec/priv.h‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,8 @@ struct nvkm_nvdec_fwif {
1414
const struct nvkm_nvdec_func *func;
1515
};
1616

17+
extern const struct nvkm_nvdec_fwif gm107_nvdec_fwif[];
18+
1719
int nvkm_nvdec_new_(const struct nvkm_nvdec_fwif *fwif, struct nvkm_device *,
1820
enum nvkm_subdev_type, int, u32 addr, struct nvkm_nvdec **);
1921
#endif

‎drivers/gpu/drm/nouveau/nvkm/engine/nvdec/tu102.c‎

Lines changed: 34 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,34 @@
1+
/*
2+
* Copyright 2023 Red Hat Inc.
3+
*
4+
* Permission is hereby granted, free of charge, to any person obtaining a
5+
* copy of this software and associated documentation files (the "Software"),
6+
* to deal in the Software without restriction, including without limitation
7+
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8+
* and/or sell copies of the Software, and to permit persons to whom the
9+
* Software is furnished to do so, subject to the following conditions:
10+
*
11+
* The above copyright notice and this permission notice shall be included in
12+
* all copies or substantial portions of the Software.
13+
*
14+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17+
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18+
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19+
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20+
* OTHER DEALINGS IN THE SOFTWARE.
21+
*/
22+
#include "priv.h"
23+
24+
#include <subdev/gsp.h>
25+
26+
int
27+
tu102_nvdec_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
28+
struct nvkm_nvdec **pnvdec)
29+
{
30+
if (nvkm_gsp_rm(device->gsp))
31+
return -ENODEV;
32+
33+
return nvkm_nvdec_new_(gm107_nvdec_fwif, device, type, inst, 0, pnvdec);
34+
}

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