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Merge tag 'dmaengine-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine
Pull dmaengine updates from Vinod Koul: "New support: - Apple admac t8112 device support - StarFive JH7110 DMA controller Updates: - Big pile of idxd updates to support IAA 2.0 device capabilities, DSA 2.0 Event Log and completion record faulting features and new DSA operations - at_xdmac supend & resume updates and driver code cleanup - k3-udma supend & resume support - k3-psil thread support for J784s4" * tag 'dmaengine-6.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (57 commits) dmaengine: idxd: add per wq PRS disable dmaengine: idxd: add pid to exported sysfs attribute for opened file dmaengine: idxd: expose fault counters to sysfs dmaengine: idxd: add a device to represent the file opened dmaengine: idxd: add per file user counters for completion record faults dmaengine: idxd: process batch descriptor completion record faults dmaengine: idxd: add descs_completed field for completion record dmaengine: idxd: process user page faults for completion record dmaengine: idxd: add idxd_copy_cr() to copy user completion record during page fault handling dmaengine: idxd: create kmem cache for event log fault items dmaengine: idxd: add per DSA wq workqueue for processing cr faults dmanegine: idxd: add debugfs for event log dump dmaengine: idxd: add interrupt handling for event log dmaengine: idxd: setup event log configuration dmaengine: idxd: add event log size sysfs attribute dmaengine: idxd: make misc interrupt one shot dt-bindings: dma: snps,dw-axi-dmac: constrain the items of resets for JH7110 dma dt-bindings: dma: Drop unneeded quotes dmaengine: at_xdmac: align declaration of ret with the rest of variables dmaengine: at_xdmac: add a warning message regarding for unpaused channels ...
2 parents 29ee463 + f2dc327 commit 7994bea

42 files changed

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Documentation/ABI/stable/sysfs-driver-dma-idxd

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@@ -136,6 +136,22 @@ Description: The last executed device administrative command's status/error.
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Also last configuration error overloaded.
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Writing to it will clear the status.
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What: /sys/bus/dsa/devices/dsa<m>/iaa_cap
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Date: Sept 14, 2022
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KernelVersion: 6.0.0
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Contact: dmaengine@vger.kernel.org
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Description: IAA (IAX) capability mask. Exported to user space for application
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consumption. This attribute should only be visible on IAA devices
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that are version 2 or later.
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What: /sys/bus/dsa/devices/dsa<m>/event_log_size
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Date: Sept 14, 2022
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KernelVersion: 6.4.0
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Contact: dmaengine@vger.kernel.org
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Description: The event log size to be configured. Default is 64 entries and
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occupies 4k size if the evl entry is 64 bytes. It's visible
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only on platforms that support the capability.
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What: /sys/bus/dsa/devices/wq<m>.<n>/block_on_fault
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Date: Oct 27, 2020
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KernelVersion: 5.11.0
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Description: Indicate whether ATS disable is turned on for the workqueue.
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0 indicates ATS is on, and 1 indicates ATS is off for the workqueue.
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What: /sys/bus/dsa/devices/wq<m>.<n>/prs_disable
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Date: Sept 14, 2022
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KernelVersion: 6.4.0
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Contact: dmaengine@vger.kernel.org
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Description: Controls whether PRS disable is turned on for the workqueue.
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0 indicates PRS is on, and 1 indicates PRS is off for the
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workqueue. This option overrides block_on_fault attribute
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if set. It's visible only on platforms that support the
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capability.
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What: /sys/bus/dsa/devices/wq<m>.<n>/occupancy
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Date May 25, 2021
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KernelVersion: 5.14.0
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1 (1/2 of max value), 2 (1/4 of the max value), and 3 (1/8 of
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the max value). It's visible only on platforms that support
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the capability.
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What: /sys/bus/dsa/devices/wq<m>.<n>/dsa<x>\!wq<m>.<n>/file<y>/cr_faults
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Date: Sept 14, 2022
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KernelVersion: 6.4.0
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Contact: dmaengine@vger.kernel.org
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Description: Show the number of Completion Record (CR) faults this application
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has caused.
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What: /sys/bus/dsa/devices/wq<m>.<n>/dsa<x>\!wq<m>.<n>/file<y>/cr_fault_failures
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Date: Sept 14, 2022
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KernelVersion: 6.4.0
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Contact: dmaengine@vger.kernel.org
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Description: Show the number of Completion Record (CR) faults failures that this
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application has caused. The failure counter is incremented when the
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driver cannot fault in the address for the CR. Typically this is caused
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by a bad address programmed in the submitted descriptor or a malicious
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submitter is using bad CR address on purpose.
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What: /sys/bus/dsa/devices/wq<m>.<n>/dsa<x>\!wq<m>.<n>/file<y>/pid
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Date: Sept 14, 2022
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KernelVersion: 6.4.0
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Contact: dmaengine@vger.kernel.org
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Description: Show the process id of the application that opened the file. This is
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helpful information for a monitor daemon that wants to kill the
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application that opened the file.

Documentation/devicetree/bindings/dma/apple,admac.yaml

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- enum:
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- apple,t6000-admac
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- apple,t8103-admac
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- apple,t8112-admac
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- const: apple,admac
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reg:

Documentation/devicetree/bindings/dma/qcom,gpi.yaml

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- qcom,sm6350-gpi-dma
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- items:
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- enum:
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- qcom,qcm2290-gpi-dma
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- qcom,qdu1000-gpi-dma
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- qcom,sc7280-gpi-dma
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- qcom,sm6115-gpi-dma

Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml

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- description: DMA main clock
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- description: DMA register access clock
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clock-names:
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items:
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- const: main
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- const: register
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'#dma-cells':
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const: 1
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description:
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- description: Reset for DMA ARESETN reset terminal
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- description: Reset for DMA RST_ASYNC reset terminal
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reset-names:
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items:
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- const: arst
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- const: rst_async
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required:
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- compatible
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- reg
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- interrupts
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- interrupt-names
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- clocks
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- clock-names
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- '#dma-cells'
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- dma-channels
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- power-domains
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- resets
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- reset-names
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additionalProperties: false
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"ch12", "ch13", "ch14", "ch15";
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clocks = <&cpg CPG_MOD R9A07G044_DMAC_ACLK>,
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<&cpg CPG_MOD R9A07G044_DMAC_PCLK>;
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clock-names = "main", "register";
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power-domains = <&cpg>;
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resets = <&cpg R9A07G044_DMAC_ARESETN>,
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<&cpg R9A07G044_DMAC_RST_ASYNC>;
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reset-names = "arst", "rst_async";
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#dma-cells = <1>;
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dma-channels = <16>;
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};

Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml

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enum:
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- snps,axi-dma-1.01a
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- intel,kmb-axi-dma
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- starfive,jh7110-axi-dma
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reg:
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minItems: 1
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maximum: 8
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resets:
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maxItems: 1
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minItems: 1
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maxItems: 2
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snps,dma-masters:
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description: |
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- snps,priority
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- snps,block-size
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if:
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properties:
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compatible:
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contains:
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enum:
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- starfive,jh7110-axi-dma
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then:
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properties:
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resets:
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minItems: 2
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items:
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- description: AXI reset line
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- description: AHB reset line
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- description: module reset
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else:
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properties:
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resets:
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maxItems: 1
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additionalProperties: false
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examples:

Documentation/devicetree/bindings/dma/ti/k3-udma.yaml

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configuration of the legacy peripheral.
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allOf:
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- $ref: "../dma-controller.yaml#"
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- $ref: ../dma-controller.yaml#
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- $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
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properties:

Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dma-1.0.yaml

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- Michael Tretter <m.tretter@pengutronix.de>
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allOf:
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- $ref: "../dma-controller.yaml#"
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- $ref: ../dma-controller.yaml#
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properties:
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"#dma-cells":

Documentation/devicetree/bindings/dma/xilinx/xlnx,zynqmp-dpdma.yaml

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- Laurent Pinchart <laurent.pinchart@ideasonboard.com>
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- $ref: "../dma-controller.yaml#"
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- $ref: ../dma-controller.yaml#
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"#dma-cells":

drivers/dma/Kconfig

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depends on (ARCH_TEGRA || COMPILE_TEST) && ARCH_DMA_ADDR_T_64BIT
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depends on IOMMU_API
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select DMA_ENGINE
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select DMA_VIRTUAL_CHANNELS
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help
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Support for the NVIDIA Tegra General Purpose Central DMA controller.
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The DMA controller has multiple DMA channels which can be configured

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