s390/pci: simplify __pciwb_mio() inline asm

niklas88 · hcahca · commit 7b2932162f66 · 2022-01-07T11:48:17.000+01:00
The PCI Write Barrier instruction ignores the registers encoded in it.
There is thus no need to explicitly set the register to zero or to
associate it with a variable at all. In the resulting binary this removes
an unnecessary lghi and it makes the code simpler.

Signed-off-by: Niklas Schnelle &lt;schnelle@linux.ibm.com&gt;
Signed-off-by: Heiko Carstens &lt;hca@linux.ibm.com&gt;
diff --git a/arch/s390/pci/pci_insn.c b/arch/s390/pci/pci_insn.c
@@ -365,10 +365,7 @@ EXPORT_SYMBOL_GPL(zpci_write_block);
 
 static inline void __pciwb_mio(void)
 {
-	unsigned long unused = 0;
-
-	asm volatile (".insn    rre,0xb9d50000,%[op],%[op]\n"
-		      : [op] "+d" (unused));
+	asm volatile (".insn    rre,0xb9d50000,0,0\n");
 }
 
 void zpci_barrier(void)

Original file line number	Diff line number	Diff line change
`@@ -365,10 +365,7 @@ EXPORT_SYMBOL_GPL(zpci_write_block);`
`365`	`365`
`366`	`366`	`static inline void __pciwb_mio(void)`
`367`	`367`	`{`
`368`		`- unsigned long unused = 0;`
`369`		`-`
`370`		`- asm volatile (".insn rre,0xb9d50000,%[op],%[op]\n"`
`371`		`- : [op] "+d" (unused));`
	`368`	`+ asm volatile (".insn rre,0xb9d50000,0,0\n");`
`372`	`369`	`}`
`373`	`370`
`374`	`371`	`void zpci_barrier(void)`