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airliedairlied
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Merge tag 'amd-drm-fixes-5.17-2022-02-23' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes
amd-drm-fixes-5.17-2022-02-23: amdgpu: - Display FP fix - PCO powergating fix - RDNA2 OEM SKU stability fixes - Display PSR fix - PCI ASPM fix - Display link encoder fix for TEST_COMMIT - Raven2 suspend/resume fix - Fix a regression in virtual display support - GPUVM eviction fix Signed-off-by: Dave Airlie <airlied@redhat.com> From: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220223214623.28823-1-alexander.deucher@amd.com
2 parents 0c31279 + c1a66c3 commit 7c17b3d

10 files changed

Lines changed: 65 additions & 23 deletions

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‎drivers/gpu/drm/amd/amdgpu/amdgpu_display.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1141,7 +1141,7 @@ int amdgpu_display_framebuffer_init(struct drm_device *dev,
11411141
if (ret)
11421142
return ret;
11431143

1144-
if (!dev->mode_config.allow_fb_modifiers) {
1144+
if (!dev->mode_config.allow_fb_modifiers && !adev->enable_virtual_display) {
11451145
drm_WARN_ONCE(dev, adev->family >= AMDGPU_FAMILY_AI,
11461146
"GFX9+ requires FB check based on format modifier\n");
11471147
ret = check_tiling_flags_gfx6(rfb);

‎drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2011,6 +2011,9 @@ static int amdgpu_pci_probe(struct pci_dev *pdev,
20112011
return -ENODEV;
20122012
}
20132013

2014+
if (amdgpu_aspm == -1 && !pcie_aspm_enabled(pdev))
2015+
amdgpu_aspm = 0;
2016+
20142017
if (amdgpu_virtual_display ||
20152018
amdgpu_device_asic_has_dc_support(flags & AMD_ASIC_MASK))
20162019
supports_atomic = true;

‎drivers/gpu/drm/amd/amdgpu/amdgpu_vkms.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -391,7 +391,6 @@ static struct drm_plane *amdgpu_vkms_plane_init(struct drm_device *dev,
391391
int index)
392392
{
393393
struct drm_plane *plane;
394-
uint64_t modifiers[] = {DRM_FORMAT_MOD_LINEAR, DRM_FORMAT_MOD_INVALID};
395394
int ret;
396395

397396
plane = kzalloc(sizeof(*plane), GFP_KERNEL);
@@ -402,7 +401,7 @@ static struct drm_plane *amdgpu_vkms_plane_init(struct drm_device *dev,
402401
&amdgpu_vkms_plane_funcs,
403402
amdgpu_vkms_formats,
404403
ARRAY_SIZE(amdgpu_vkms_formats),
405-
modifiers, type, NULL);
404+
NULL, type, NULL);
406405
if (ret) {
407406
kfree(plane);
408407
return ERR_PTR(ret);

‎drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c‎

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -768,11 +768,16 @@ int amdgpu_vm_validate_pt_bos(struct amdgpu_device *adev, struct amdgpu_vm *vm,
768768
* Check if all VM PDs/PTs are ready for updates
769769
*
770770
* Returns:
771-
* True if eviction list is empty.
771+
* True if VM is not evicting.
772772
*/
773773
bool amdgpu_vm_ready(struct amdgpu_vm *vm)
774774
{
775-
return list_empty(&vm->evicted);
775+
bool ret;
776+
777+
amdgpu_vm_eviction_lock(vm);
778+
ret = !vm->evicting;
779+
amdgpu_vm_eviction_unlock(vm);
780+
return ret;
776781
}
777782

778783
/**

‎drivers/gpu/drm/amd/amdgpu/soc15.c‎

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -619,8 +619,8 @@ soc15_asic_reset_method(struct amdgpu_device *adev)
619619
static int soc15_asic_reset(struct amdgpu_device *adev)
620620
{
621621
/* original raven doesn't have full asic reset */
622-
if ((adev->apu_flags & AMD_APU_IS_RAVEN) &&
623-
!(adev->apu_flags & AMD_APU_IS_RAVEN2))
622+
if ((adev->apu_flags & AMD_APU_IS_RAVEN) ||
623+
(adev->apu_flags & AMD_APU_IS_RAVEN2))
624624
return 0;
625625

626626
switch (soc15_asic_reset_method(adev)) {
@@ -1114,8 +1114,11 @@ static int soc15_common_early_init(void *handle)
11141114
AMD_CG_SUPPORT_SDMA_LS |
11151115
AMD_CG_SUPPORT_VCN_MGCG;
11161116

1117+
/*
1118+
* MMHUB PG needs to be disabled for Picasso for
1119+
* stability reasons.
1120+
*/
11171121
adev->pg_flags = AMD_PG_SUPPORT_SDMA |
1118-
AMD_PG_SUPPORT_MMHUB |
11191122
AMD_PG_SUPPORT_VCN;
11201123
} else {
11211124
adev->cg_flags = AMD_CG_SUPPORT_GFX_MGCG |

‎drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c‎

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -4256,6 +4256,9 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
42564256
}
42574257
#endif
42584258

4259+
/* Disable vblank IRQs aggressively for power-saving. */
4260+
adev_to_drm(adev)->vblank_disable_immediate = true;
4261+
42594262
/* loops over all connectors on the board */
42604263
for (i = 0; i < link_cnt; i++) {
42614264
struct dc_link *link = NULL;
@@ -4301,19 +4304,17 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev)
43014304
update_connector_ext_caps(aconnector);
43024305
if (psr_feature_enabled)
43034306
amdgpu_dm_set_psr_caps(link);
4307+
4308+
/* TODO: Fix vblank control helpers to delay PSR entry to allow this when
4309+
* PSR is also supported.
4310+
*/
4311+
if (link->psr_settings.psr_feature_enabled)
4312+
adev_to_drm(adev)->vblank_disable_immediate = false;
43044313
}
43054314

43064315

43074316
}
43084317

4309-
/*
4310-
* Disable vblank IRQs aggressively for power-saving.
4311-
*
4312-
* TODO: Fix vblank control helpers to delay PSR entry to allow this when PSR
4313-
* is also supported.
4314-
*/
4315-
adev_to_drm(adev)->vblank_disable_immediate = !psr_feature_enabled;
4316-
43174318
/* Software is initialized. Now we can register interrupt handlers. */
43184319
switch (adev->asic_type) {
43194320
#if defined(CONFIG_DRM_AMD_DC_SI)

‎drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/dcn30_clk_mgr.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -473,8 +473,10 @@ static void dcn3_get_memclk_states_from_smu(struct clk_mgr *clk_mgr_base)
473473
clk_mgr_base->bw_params->dc_mode_softmax_memclk = dcn30_smu_get_dc_mode_max_dpm_freq(clk_mgr, PPCLK_UCLK);
474474

475475
/* Refresh bounding box */
476+
DC_FP_START();
476477
clk_mgr_base->ctx->dc->res_pool->funcs->update_bw_bounding_box(
477478
clk_mgr->base.ctx->dc, clk_mgr_base->bw_params);
479+
DC_FP_END();
478480
}
479481

480482
static bool dcn3_is_smu_present(struct clk_mgr *clk_mgr_base)

‎drivers/gpu/drm/amd/display/dc/core/dc.c‎

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -985,10 +985,13 @@ static bool dc_construct(struct dc *dc,
985985
goto fail;
986986
#ifdef CONFIG_DRM_AMD_DC_DCN
987987
dc->clk_mgr->force_smu_not_present = init_params->force_smu_not_present;
988-
#endif
989988

990-
if (dc->res_pool->funcs->update_bw_bounding_box)
989+
if (dc->res_pool->funcs->update_bw_bounding_box) {
990+
DC_FP_START();
991991
dc->res_pool->funcs->update_bw_bounding_box(dc, dc->clk_mgr->bw_params);
992+
DC_FP_END();
993+
}
994+
#endif
992995

993996
/* Creation of current_state must occur after dc->dml
994997
* is initialized in dc_create_resource_pool because

‎drivers/gpu/drm/amd/display/dc/core/dc_resource.c‎

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1964,10 +1964,6 @@ enum dc_status dc_remove_stream_from_ctx(
19641964
dc->res_pool,
19651965
del_pipe->stream_res.stream_enc,
19661966
false);
1967-
/* Release link encoder from stream in new dc_state. */
1968-
if (dc->res_pool->funcs->link_enc_unassign)
1969-
dc->res_pool->funcs->link_enc_unassign(new_ctx, del_pipe->stream);
1970-
19711967
#if defined(CONFIG_DRM_AMD_DC_DCN)
19721968
if (is_dp_128b_132b_signal(del_pipe)) {
19731969
update_hpo_dp_stream_engine_usage(

‎drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c‎

Lines changed: 31 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -421,6 +421,36 @@ static int sienna_cichlid_store_powerplay_table(struct smu_context *smu)
421421
return 0;
422422
}
423423

424+
static int sienna_cichlid_patch_pptable_quirk(struct smu_context *smu)
425+
{
426+
struct amdgpu_device *adev = smu->adev;
427+
uint32_t *board_reserved;
428+
uint16_t *freq_table_gfx;
429+
uint32_t i;
430+
431+
/* Fix some OEM SKU specific stability issues */
432+
GET_PPTABLE_MEMBER(BoardReserved, &board_reserved);
433+
if ((adev->pdev->device == 0x73DF) &&
434+
(adev->pdev->revision == 0XC3) &&
435+
(adev->pdev->subsystem_device == 0x16C2) &&
436+
(adev->pdev->subsystem_vendor == 0x1043))
437+
board_reserved[0] = 1387;
438+
439+
GET_PPTABLE_MEMBER(FreqTableGfx, &freq_table_gfx);
440+
if ((adev->pdev->device == 0x73DF) &&
441+
(adev->pdev->revision == 0XC3) &&
442+
((adev->pdev->subsystem_device == 0x16C2) ||
443+
(adev->pdev->subsystem_device == 0x133C)) &&
444+
(adev->pdev->subsystem_vendor == 0x1043)) {
445+
for (i = 0; i < NUM_GFXCLK_DPM_LEVELS; i++) {
446+
if (freq_table_gfx[i] > 2500)
447+
freq_table_gfx[i] = 2500;
448+
}
449+
}
450+
451+
return 0;
452+
}
453+
424454
static int sienna_cichlid_setup_pptable(struct smu_context *smu)
425455
{
426456
int ret = 0;
@@ -441,7 +471,7 @@ static int sienna_cichlid_setup_pptable(struct smu_context *smu)
441471
if (ret)
442472
return ret;
443473

444-
return ret;
474+
return sienna_cichlid_patch_pptable_quirk(smu);
445475
}
446476

447477
static int sienna_cichlid_tables_init(struct smu_context *smu)

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