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| 1 | +# SPDX-License-Identifier: GPL-2.0-only |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/thermal/rockchip-thermal.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: Temperature Sensor ADC (TSADC) on Rockchip SoCs |
| 8 | + |
| 9 | +maintainers: |
| 10 | + - Heiko Stuebner <heiko@sntech.de> |
| 11 | + |
| 12 | +properties: |
| 13 | + compatible: |
| 14 | + enum: |
| 15 | + - rockchip,px30-tsadc # PX30 SoCs |
| 16 | + - rockchip,rv1108-tsadc # RV1108 SoCs |
| 17 | + - rockchip,rk3228-tsadc # RK3228 SoCs |
| 18 | + - rockchip,rk3288-tsadc # RK3288 SoCs |
| 19 | + - rockchip,rk3328-tsadc # RK3328 SoCs |
| 20 | + - rockchip,rk3368-tsadc # RK3368 SoCs |
| 21 | + - rockchip,rk3399-tsadc # RK3399 SoCs |
| 22 | + |
| 23 | + reg: |
| 24 | + maxItems: 1 |
| 25 | + |
| 26 | + interrupts: |
| 27 | + maxItems: 1 |
| 28 | + |
| 29 | + clocks: |
| 30 | + minItems: 2 |
| 31 | + maxItems: 2 |
| 32 | + |
| 33 | + clock-names: |
| 34 | + items: |
| 35 | + - const: tsadc |
| 36 | + - const: apb_pclk |
| 37 | + |
| 38 | + resets: |
| 39 | + maxItems: 1 |
| 40 | + |
| 41 | + reset-names: |
| 42 | + items: |
| 43 | + - const: tsadc-apb |
| 44 | + |
| 45 | + "#thermal-sensor-cells": |
| 46 | + const: 1 |
| 47 | + |
| 48 | + rockchip,grf: |
| 49 | + description: The phandle of the syscon node for the general register file. |
| 50 | + $ref: /schemas/types.yaml#/definitions/phandle |
| 51 | + |
| 52 | + rockchip,hw-tshut-temp: |
| 53 | + description: The hardware-controlled shutdown temperature value. |
| 54 | + $ref: /schemas/types.yaml#/definitions/uint32 |
| 55 | + |
| 56 | + rockchip,hw-tshut-mode: |
| 57 | + description: The hardware-controlled shutdown mode 0:CRU 1:GPIO. |
| 58 | + $ref: /schemas/types.yaml#/definitions/uint32 |
| 59 | + enum: [0, 1] |
| 60 | + |
| 61 | + rockchip,hw-tshut-polarity: |
| 62 | + description: The hardware-controlled active polarity 0:LOW 1:HIGH. |
| 63 | + $ref: /schemas/types.yaml#/definitions/uint32 |
| 64 | + enum: [0, 1] |
| 65 | + |
| 66 | +required: |
| 67 | + - compatible |
| 68 | + - reg |
| 69 | + - interrupts |
| 70 | + - clocks |
| 71 | + - clock-names |
| 72 | + - resets |
| 73 | + - reset-names |
| 74 | + - "#thermal-sensor-cells" |
| 75 | + |
| 76 | +additionalProperties: false |
| 77 | + |
| 78 | +examples: |
| 79 | + - | |
| 80 | + #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 81 | + #include <dt-bindings/clock/rk3288-cru.h> |
| 82 | +
|
| 83 | + tsadc: tsadc@ff280000 { |
| 84 | + compatible = "rockchip,rk3288-tsadc"; |
| 85 | + reg = <0xff280000 0x100>; |
| 86 | + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; |
| 87 | + clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>; |
| 88 | + clock-names = "tsadc", "apb_pclk"; |
| 89 | + resets = <&cru SRST_TSADC>; |
| 90 | + reset-names = "tsadc-apb"; |
| 91 | + #thermal-sensor-cells = <1>; |
| 92 | + rockchip,hw-tshut-temp = <95000>; |
| 93 | + rockchip,hw-tshut-mode = <0>; |
| 94 | + rockchip,hw-tshut-polarity = <0>; |
| 95 | + }; |
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