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paliLorenzo Pieralisi
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PCI: aardvark: Clear all MSIs at setup
We already clear all the other interrupts (ISR0, ISR1, HOST_CTRL_INT). Define a new macro PCIE_MSI_ALL_MASK and do the same clearing for MSIs, to ensure that we don't start receiving spurious interrupts. Use this new mask in advk_pcie_handle_msi(); Link: https://lore.kernel.org/r/20211130172913.9727-5-kabel@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Marek Behún <kabel@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
1 parent 1d3e170 commit 7d8dc1f

1 file changed

Lines changed: 4 additions & 2 deletions

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drivers/pci/controller/pci-aardvark.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -116,6 +116,7 @@
116116
#define PCIE_MSI_ADDR_HIGH_REG (CONTROL_BASE_ADDR + 0x54)
117117
#define PCIE_MSI_STATUS_REG (CONTROL_BASE_ADDR + 0x58)
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#define PCIE_MSI_MASK_REG (CONTROL_BASE_ADDR + 0x5C)
119+
#define PCIE_MSI_ALL_MASK GENMASK(31, 0)
119120
#define PCIE_MSI_PAYLOAD_REG (CONTROL_BASE_ADDR + 0x9C)
120121
#define PCIE_MSI_DATA_MASK GENMASK(15, 0)
121122

@@ -571,6 +572,7 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie)
571572
advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG);
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573574
/* Clear all interrupts */
575+
advk_writel(pcie, PCIE_MSI_ALL_MASK, PCIE_MSI_STATUS_REG);
574576
advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_REG);
575577
advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG);
576578
advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG);
@@ -583,7 +585,7 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie)
583585
advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_MASK_REG);
584586

585587
/* Unmask all MSIs */
586-
advk_writel(pcie, 0, PCIE_MSI_MASK_REG);
588+
advk_writel(pcie, ~(u32)PCIE_MSI_ALL_MASK, PCIE_MSI_MASK_REG);
587589

588590
/* Enable summary interrupt for GIC SPI source */
589591
reg = PCIE_IRQ_ALL_MASK & (~PCIE_IRQ_ENABLE_INTS_MASK);
@@ -1399,7 +1401,7 @@ static void advk_pcie_handle_msi(struct advk_pcie *pcie)
13991401

14001402
msi_mask = advk_readl(pcie, PCIE_MSI_MASK_REG);
14011403
msi_val = advk_readl(pcie, PCIE_MSI_STATUS_REG);
1402-
msi_status = msi_val & ~msi_mask;
1404+
msi_status = msi_val & ((~msi_mask) & PCIE_MSI_ALL_MASK);
14031405

14041406
for (msi_idx = 0; msi_idx < MSI_IRQ_NUM; msi_idx++) {
14051407
if (!(BIT(msi_idx) & msi_status))

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