@@ -152,6 +152,160 @@ static const struct camss_subdev_resources vfe_res_8x16[] = {
152152 }
153153};
154154
155+ static const struct camss_subdev_resources csid_res_8x53 [] = {
156+ /* CSID0 */
157+ {
158+ .regulators = { "vdda" },
159+ .clock = { "top_ahb" , "ispif_ahb" , "csi0_ahb" , "ahb" ,
160+ "csi0" , "csi0_phy" , "csi0_pix" , "csi0_rdi" },
161+ .clock_rate = { { 0 },
162+ { 0 },
163+ { 0 },
164+ { 0 },
165+ { 100000000 , 200000000 , 310000000 ,
166+ 400000000 , 465000000 },
167+ { 0 },
168+ { 0 },
169+ { 0 } },
170+ .reg = { "csid0" },
171+ .interrupt = { "csid0" },
172+ .csid = {
173+ .hw_ops = & csid_ops_4_7 ,
174+ .parent_dev_ops = & vfe_parent_dev_ops ,
175+ .formats = & csid_formats_4_7
176+ }
177+ },
178+
179+ /* CSID1 */
180+ {
181+ .regulators = { "vdda" },
182+ .clock = { "top_ahb" , "ispif_ahb" , "csi1_ahb" , "ahb" ,
183+ "csi1" , "csi1_phy" , "csi1_pix" , "csi1_rdi" },
184+ .clock_rate = { { 0 },
185+ { 0 },
186+ { 0 },
187+ { 0 },
188+ { 100000000 , 200000000 , 310000000 ,
189+ 400000000 , 465000000 },
190+ { 0 },
191+ { 0 },
192+ { 0 } },
193+ .reg = { "csid1" },
194+ .interrupt = { "csid1" },
195+ .csid = {
196+ .hw_ops = & csid_ops_4_7 ,
197+ .parent_dev_ops = & vfe_parent_dev_ops ,
198+ .formats = & csid_formats_4_7
199+ }
200+ },
201+
202+ /* CSID2 */
203+ {
204+ .regulators = { "vdda" },
205+ .clock = { "top_ahb" , "ispif_ahb" , "csi2_ahb" , "ahb" ,
206+ "csi2" , "csi2_phy" , "csi2_pix" , "csi2_rdi" },
207+ .clock_rate = { { 0 },
208+ { 0 },
209+ { 0 },
210+ { 0 },
211+ { 100000000 , 200000000 , 310000000 ,
212+ 400000000 , 465000000 },
213+ { 0 },
214+ { 0 },
215+ { 0 } },
216+ .reg = { "csid2" },
217+ .interrupt = { "csid2" },
218+ .csid = {
219+ .hw_ops = & csid_ops_4_7 ,
220+ .parent_dev_ops = & vfe_parent_dev_ops ,
221+ .formats = & csid_formats_4_7
222+ }
223+ },
224+ };
225+
226+ static const struct camss_subdev_resources ispif_res_8x53 = {
227+ /* ISPIF */
228+ .clock = { "top_ahb" , "ahb" , "ispif_ahb" ,
229+ "csi0" , "csi0_pix" , "csi0_rdi" ,
230+ "csi1" , "csi1_pix" , "csi1_rdi" ,
231+ "csi2" , "csi2_pix" , "csi2_rdi" },
232+ .clock_for_reset = { "vfe0" , "csi_vfe0" , "vfe1" , "csi_vfe1" },
233+ .reg = { "ispif" , "csi_clk_mux" },
234+ .interrupt = { "ispif" },
235+ };
236+
237+ static const struct camss_subdev_resources vfe_res_8x53 [] = {
238+ /* VFE0 */
239+ {
240+ .regulators = {},
241+ .clock = { "top_ahb" , "ahb" , "ispif_ahb" ,
242+ "vfe0" , "csi_vfe0" , "vfe0_ahb" , "vfe0_axi" },
243+ .clock_rate = { { 0 },
244+ { 0 },
245+ { 0 },
246+ { 50000000 , 100000000 , 133330000 ,
247+ 160000000 , 200000000 , 266670000 ,
248+ 310000000 , 400000000 , 465000000 },
249+ { 0 },
250+ { 0 },
251+ { 0 } },
252+ .reg = { "vfe0" },
253+ .interrupt = { "vfe0" },
254+ .vfe = {
255+ .line_num = 3 ,
256+ .has_pd = true,
257+ .pd_name = "vfe0" ,
258+ .hw_ops = & vfe_ops_4_1 ,
259+ .formats_rdi = & vfe_formats_rdi_8x16 ,
260+ .formats_pix = & vfe_formats_pix_8x16
261+ }
262+ },
263+
264+ /* VFE1 */
265+ {
266+ .regulators = {},
267+ .clock = { "top_ahb" , "ahb" , "ispif_ahb" ,
268+ "vfe1" , "csi_vfe1" , "vfe1_ahb" , "vfe1_axi" },
269+ .clock_rate = { { 0 },
270+ { 0 },
271+ { 0 },
272+ { 50000000 , 100000000 , 133330000 ,
273+ 160000000 , 200000000 , 266670000 ,
274+ 310000000 , 400000000 , 465000000 },
275+ { 0 },
276+ { 0 },
277+ { 0 } },
278+ .reg = { "vfe1" },
279+ .interrupt = { "vfe1" },
280+ .vfe = {
281+ .line_num = 3 ,
282+ .has_pd = true,
283+ .pd_name = "vfe1" ,
284+ .hw_ops = & vfe_ops_4_1 ,
285+ .formats_rdi = & vfe_formats_rdi_8x16 ,
286+ .formats_pix = & vfe_formats_pix_8x16
287+ }
288+ }
289+ };
290+
291+ static const struct resources_icc icc_res_8x53 [] = {
292+ {
293+ .name = "cam_ahb" ,
294+ .icc_bw_tbl .avg = 38400 ,
295+ .icc_bw_tbl .peak = 76800 ,
296+ },
297+ {
298+ .name = "cam_vfe0_mem" ,
299+ .icc_bw_tbl .avg = 939524 ,
300+ .icc_bw_tbl .peak = 1342177 ,
301+ },
302+ {
303+ .name = "cam_vfe1_mem" ,
304+ .icc_bw_tbl .avg = 939524 ,
305+ .icc_bw_tbl .peak = 1342177 ,
306+ },
307+ };
308+
155309static const struct camss_subdev_resources csiphy_res_8x96 [] = {
156310 /* CSIPHY0 */
157311 {
@@ -2248,6 +2402,7 @@ static int camss_probe(struct platform_device *pdev)
22482402 return - ENOMEM ;
22492403
22502404 if (camss -> res -> version == CAMSS_8x16 ||
2405+ camss -> res -> version == CAMSS_8x53 ||
22512406 camss -> res -> version == CAMSS_8x96 ) {
22522407 camss -> ispif = devm_kcalloc (dev , 1 , sizeof (* camss -> ispif ), GFP_KERNEL );
22532408 if (!camss -> ispif )
@@ -2389,6 +2544,20 @@ static const struct camss_resources msm8916_resources = {
23892544 .link_entities = camss_link_entities
23902545};
23912546
2547+ static const struct camss_resources msm8953_resources = {
2548+ .version = CAMSS_8x53 ,
2549+ .icc_res = icc_res_8x53 ,
2550+ .icc_path_num = ARRAY_SIZE (icc_res_8x53 ),
2551+ .csiphy_res = csiphy_res_8x96 ,
2552+ .csid_res = csid_res_8x53 ,
2553+ .ispif_res = & ispif_res_8x53 ,
2554+ .vfe_res = vfe_res_8x53 ,
2555+ .csiphy_num = ARRAY_SIZE (csiphy_res_8x96 ),
2556+ .csid_num = ARRAY_SIZE (csid_res_8x53 ),
2557+ .vfe_num = ARRAY_SIZE (vfe_res_8x53 ),
2558+ .link_entities = camss_link_entities
2559+ };
2560+
23922561static const struct camss_resources msm8996_resources = {
23932562 .version = CAMSS_8x96 ,
23942563 .csiphy_res = csiphy_res_8x96 ,
@@ -2455,6 +2624,7 @@ static const struct camss_resources sc8280xp_resources = {
24552624
24562625static const struct of_device_id camss_dt_match [] = {
24572626 { .compatible = "qcom,msm8916-camss" , .data = & msm8916_resources },
2627+ { .compatible = "qcom,msm8953-camss" , .data = & msm8953_resources },
24582628 { .compatible = "qcom,msm8996-camss" , .data = & msm8996_resources },
24592629 { .compatible = "qcom,sdm660-camss" , .data = & sdm660_resources },
24602630 { .compatible = "qcom,sdm845-camss" , .data = & sdm845_resources },
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