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pinctrl: renesas: r8a77990: Add support for AVB power-source
Add support for configuring the I/O voltage level of the Ethernet AVB pins on the R-Car E3 SoC. "PIN_VDDQ_AVB0" can be configured for 2.5V or 3.3V operation. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/57883cd2d94c7919dc0f0db07cf6169ca89538e6.1678271030.git.geert+renesas@glider.be
1 parent 6cd853a commit 7f25d5b

1 file changed

Lines changed: 19 additions & 10 deletions

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drivers/pinctrl/renesas/pfc-r8a77990.c

Lines changed: 19 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -56,7 +56,8 @@
5656
PIN_NOGP_CFG(TCK, "TCK", fn, SH_PFC_PIN_CFG_PULL_UP), \
5757
PIN_NOGP_CFG(TDI, "TDI", fn, SH_PFC_PIN_CFG_PULL_UP), \
5858
PIN_NOGP_CFG(TMS, "TMS", fn, SH_PFC_PIN_CFG_PULL_UP), \
59-
PIN_NOGP_CFG(TRST_N, "TRST_N", fn, SH_PFC_PIN_CFG_PULL_UP)
59+
PIN_NOGP_CFG(TRST_N, "TRST_N", fn, SH_PFC_PIN_CFG_PULL_UP), \
60+
PIN_NOGP_CFG(VDDQ_AVB0, "VDDQ_AVB0", fn, SH_PFC_PIN_CFG_IO_VOLTAGE_25_33)
6061

6162
/*
6263
* F_() : just information
@@ -507,7 +508,8 @@ MOD_SEL0_1_0
507508
FM(AVB_TD3) \
508509
FM(PRESETOUT_N) FM(FSCLKST_N) FM(TRST_N) FM(TCK) FM(TMS) FM(TDI) \
509510
FM(ASEBRK) \
510-
FM(MLB_REF)
511+
FM(MLB_REF) \
512+
FM(VDDQ_AVB0)
511513

512514
enum {
513515
PINMUX_RESERVED = 0,
@@ -5040,28 +5042,35 @@ static const struct pinmux_drive_reg pinmux_drive_regs[] = {
50405042

50415043
enum ioctrl_regs {
50425044
POCCTRL0,
5045+
POCCTRL2,
50435046
TDSELCTRL,
50445047
};
50455048

50465049
static const struct pinmux_ioctrl_reg pinmux_ioctrl_regs[] = {
50475050
[POCCTRL0] = { 0xe6060380, },
5051+
[POCCTRL2] = { 0xe6060388, },
50485052
[TDSELCTRL] = { 0xe60603c0, },
50495053
{ /* sentinel */ },
50505054
};
50515055

50525056
static int r8a77990_pin_to_pocctrl(unsigned int pin, u32 *pocctrl)
50535057
{
5054-
int bit = -EINVAL;
5058+
switch (pin) {
5059+
case RCAR_GP_PIN(3, 0) ... RCAR_GP_PIN(3, 11):
5060+
*pocctrl = pinmux_ioctrl_regs[POCCTRL0].reg;
5061+
return pin & 0x1f;
50555062

5056-
*pocctrl = pinmux_ioctrl_regs[POCCTRL0].reg;
5063+
case RCAR_GP_PIN(4, 0) ... RCAR_GP_PIN(4, 10):
5064+
*pocctrl = pinmux_ioctrl_regs[POCCTRL0].reg;
5065+
return (pin & 0x1f) + 19;
50575066

5058-
if (pin >= RCAR_GP_PIN(3, 0) && pin <= RCAR_GP_PIN(3, 11))
5059-
bit = pin & 0x1f;
5067+
case PIN_VDDQ_AVB0:
5068+
*pocctrl = pinmux_ioctrl_regs[POCCTRL2].reg;
5069+
return 0;
50605070

5061-
if (pin >= RCAR_GP_PIN(4, 0) && pin <= RCAR_GP_PIN(4, 10))
5062-
bit = (pin & 0x1f) + 19;
5063-
5064-
return bit;
5071+
default:
5072+
return -EINVAL;
5073+
}
50655074
}
50665075

50675076
static const struct pinmux_bias_reg pinmux_bias_regs[] = {

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