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Merge tag 'icc-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next
Georgi writes: interconnect changes for 6.7 This pull request contains the interconnect changes for the 6.7-rc1 merge window which contains just driver changes with the following highlights: Driver changes: - New interconnect driver for the SDX75 platform. - Support for coefficients to allow node-specific rate adjustments. - Update DT bindings according to the recent changes of how we represent the SMD and RPM bus clocks on Qualcomm platforms. - Misc fixes and cleanups. Signed-off-by: Georgi Djakov <djakov@kernel.org> * tag 'icc-6.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc: (36 commits) interconnect: qcom: Convert to platform remove callback returning void dt-bindings: interconnect: qcom,rpmh: do not require reg on SDX65 MC virt interconnect: imx: Replace inclusion of kernel.h in the header interconnect: fix error handling in qnoc_probe() interconnect: qcom: osm-l3: Replace custom implementation of COUNT_ARGS() interconnect: msm8974: Replace custom implementation of COUNT_ARGS() interconnect: imx: Replace custom implementation of COUNT_ARGS() interconnect: qcom: Add SDX75 interconnect provider driver dt-bindings: interconnect: Add compatibles for SDX75 interconnect: qcom: sm8350: Set ACV enable_mask interconnect: qcom: sm8250: Set ACV enable_mask interconnect: qcom: sm8150: Set ACV enable_mask interconnect: qcom: sm6350: Set ACV enable_mask interconnect: qcom: sdm845: Set ACV enable_mask interconnect: qcom: sdm670: Set ACV enable_mask interconnect: qcom: sc8280xp: Set ACV enable_mask interconnect: qcom: sc8180x: Set ACV enable_mask interconnect: qcom: sc7280: Set ACV enable_mask interconnect: qcom: sc7180: Set ACV enable_mask interconnect: qcom: qdu1000: Set ACV enable_mask ...
2 parents 40ea89f + d4c720a commit 800dce4

40 files changed

Lines changed: 1916 additions & 337 deletions

‎Documentation/devicetree/bindings/interconnect/qcom,msm8939.yaml‎

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interconnect/qcom,msm8939.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm MSM8939 Network-On-Chip interconnect
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maintainers:
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- Konrad Dybcio <konradybcio@kernel.org>
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description: |
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The Qualcomm MSM8939 interconnect providers support adjusting the
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bandwidth requirements between the various NoC fabrics.
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allOf:
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- $ref: qcom,rpm-common.yaml#
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properties:
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compatible:
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enum:
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- qcom,msm8939-bimc
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- qcom,msm8939-pcnoc
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- qcom,msm8939-snoc
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reg:
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maxItems: 1
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patternProperties:
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'^interconnect-[a-z0-9\-]+$':
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type: object
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$ref: qcom,rpm-common.yaml#
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description:
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The interconnect providers do not have a separate QoS register space,
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but share parent's space.
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allOf:
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- $ref: qcom,rpm-common.yaml#
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properties:
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compatible:
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const: qcom,msm8939-snoc-mm
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required:
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- compatible
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unevaluatedProperties: false
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required:
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- compatible
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- reg
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,rpmcc.h>
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snoc: interconnect@580000 {
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compatible = "qcom,msm8939-snoc";
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reg = <0x00580000 0x14000>;
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#interconnect-cells = <1>;
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};
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bimc: interconnect@400000 {
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compatible = "qcom,msm8939-bimc";
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reg = <0x00400000 0x62000>;
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#interconnect-cells = <1>;
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snoc_mm: interconnect-snoc {
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compatible = "qcom,msm8939-snoc-mm";
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#interconnect-cells = <1>;
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};
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};

‎Documentation/devicetree/bindings/interconnect/qcom,msm8996.yaml‎

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interconnect/qcom,msm8996.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm MSM8996 Network-On-Chip interconnect
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maintainers:
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- Konrad Dybcio <konradybcio@kernel.org>
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description: |
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The Qualcomm MSM8996 interconnect providers support adjusting the
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bandwidth requirements between the various NoC fabrics.
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properties:
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compatible:
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enum:
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- qcom,msm8996-a0noc
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- qcom,msm8996-a1noc
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- qcom,msm8996-a2noc
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- qcom,msm8996-bimc
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- qcom,msm8996-cnoc
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- qcom,msm8996-mnoc
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- qcom,msm8996-pnoc
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- qcom,msm8996-snoc
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reg:
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maxItems: 1
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clock-names:
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minItems: 1
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maxItems: 3
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clocks:
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minItems: 1
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maxItems: 3
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power-domains:
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maxItems: 1
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required:
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- compatible
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- reg
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unevaluatedProperties: false
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allOf:
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- $ref: qcom,rpm-common.yaml#
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- if:
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properties:
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compatible:
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const: qcom,msm8996-a0noc
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then:
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properties:
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clocks:
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items:
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- description: Aggregate0 System NoC AXI Clock.
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- description: Aggregate0 Config NoC AHB Clock.
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- description: Aggregate0 NoC MPU Clock.
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clock-names:
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items:
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- const: aggre0_snoc_axi
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- const: aggre0_cnoc_ahb
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- const: aggre0_noc_mpu_cfg
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required:
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- power-domains
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- if:
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properties:
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compatible:
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const: qcom,msm8996-mnoc
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then:
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properties:
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clocks:
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items:
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- description: CPU-NoC High-performance Bus Clock.
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clock-names:
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const: iface
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- if:
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properties:
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compatible:
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const: qcom,msm8996-a2noc
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then:
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properties:
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clocks:
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items:
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- description: Aggregate2 NoC UFS AXI Clock
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- description: UFS AXI Clock
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clock-names:
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items:
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- const: aggre2_ufs_axi
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- const: ufs_axi
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-msm8996.h>
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#include <dt-bindings/clock/qcom,mmcc-msm8996.h>
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#include <dt-bindings/clock/qcom,rpmcc.h>
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bimc: interconnect@408000 {
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compatible = "qcom,msm8996-bimc";
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reg = <0x00408000 0x5a000>;
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#interconnect-cells = <1>;
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};
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a0noc: interconnect@543000 {
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compatible = "qcom,msm8996-a0noc";
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reg = <0x00543000 0x6000>;
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#interconnect-cells = <1>;
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clocks = <&gcc GCC_AGGRE0_SNOC_AXI_CLK>,
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<&gcc GCC_AGGRE0_CNOC_AHB_CLK>,
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<&gcc GCC_AGGRE0_NOC_MPU_CFG_AHB_CLK>;
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clock-names = "aggre0_snoc_axi",
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"aggre0_cnoc_ahb",
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"aggre0_noc_mpu_cfg";
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power-domains = <&gcc AGGRE0_NOC_GDSC>;
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};

‎Documentation/devicetree/bindings/interconnect/qcom,qcm2290.yaml‎

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The Qualcomm QCM2290 interconnect providers support adjusting the
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bandwidth requirements between the various NoC fabrics.
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allOf:
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- $ref: qcom,rpm-common.yaml#
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properties:
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reg:
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maxItems: 1
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- qcom,qcm2290-cnoc
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- qcom,qcm2290-snoc
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'#interconnect-cells':
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const: 1
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clock-names:
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items:
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- const: bus
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- const: bus_a
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clocks:
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items:
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- description: Bus Clock
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- description: Bus A Clock
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# Child node's properties
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patternProperties:
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'^interconnect-[a-z0-9]+$':
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The interconnect providers do not have a separate QoS register space,
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but share parent's space.
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allOf:
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- $ref: qcom,rpm-common.yaml#
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properties:
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compatible:
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enum:
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- qcom,qcm2290-qup-virt
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- qcom,qcm2290-mmrt-virt
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- qcom,qcm2290-mmnrt-virt
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'#interconnect-cells':
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const: 1
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clock-names:
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items:
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- const: bus
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- const: bus_a
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clocks:
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items:
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- description: Bus Clock
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- description: Bus A Clock
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required:
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- compatible
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- '#interconnect-cells'
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- clock-names
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- clocks
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additionalProperties: false
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unevaluatedProperties: false
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required:
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- compatible
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- reg
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- '#interconnect-cells'
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- clock-names
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- clocks
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additionalProperties: false
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unevaluatedProperties: false
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examples:
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- |
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compatible = "qcom,qcm2290-snoc";
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reg = <0x01880000 0x60200>;
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#interconnect-cells = <1>;
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clock-names = "bus", "bus_a";
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clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
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<&rpmcc RPM_SMD_SNOC_A_CLK>;
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qup_virt: interconnect-qup {
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compatible = "qcom,qcm2290-qup-virt";
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#interconnect-cells = <1>;
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clock-names = "bus", "bus_a";
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clocks = <&rpmcc RPM_SMD_QUP_CLK>,
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<&rpmcc RPM_SMD_QUP_A_CLK>;
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};
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mmnrt_virt: interconnect-mmnrt {
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compatible = "qcom,qcm2290-mmnrt-virt";
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#interconnect-cells = <1>;
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clock-names = "bus", "bus_a";
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clocks = <&rpmcc RPM_SMD_MMNRT_CLK>,
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<&rpmcc RPM_SMD_MMNRT_A_CLK>;
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};
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mmrt_virt: interconnect-mmrt {
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compatible = "qcom,qcm2290-mmrt-virt";
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#interconnect-cells = <1>;
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clock-names = "bus", "bus_a";
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clocks = <&rpmcc RPM_SMD_MMRT_CLK>,
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<&rpmcc RPM_SMD_MMRT_A_CLK>;
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};
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};
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cnoc: interconnect@1900000 {
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compatible = "qcom,qcm2290-cnoc";
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reg = <0x01900000 0x8200>;
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#interconnect-cells = <1>;
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clock-names = "bus", "bus_a";
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clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
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<&rpmcc RPM_SMD_CNOC_A_CLK>;
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};
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bimc: interconnect@4480000 {
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compatible = "qcom,qcm2290-bimc";
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reg = <0x04480000 0x80000>;
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#interconnect-cells = <1>;
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clock-names = "bus", "bus_a";
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clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
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<&rpmcc RPM_SMD_BIMC_A_CLK>;
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};

‎Documentation/devicetree/bindings/interconnect/qcom,rpm-common.yaml‎

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interconnect/qcom,rpm-common.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm RPMh Network-On-Chip Interconnect
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maintainers:
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- Konrad Dybcio <konradybcio@kernel.org>
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description:
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RPM interconnect providers support for managing system bandwidth requirements
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through manual requests based on either predefined values or as indicated by
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the bus monitor hardware. Each provider node represents a NoC bus master,
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driven by a dedicated clock source.
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properties:
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'#interconnect-cells':
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oneOf:
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- const: 2
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- const: 1
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deprecated: true
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required:
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- '#interconnect-cells'
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additionalProperties: true

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