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suryasaimadhusuryasaimadhu
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x86/mce: Get rid of msr_ops
Avoid having indirect calls and use a normal function which returns the proper MSR address based on ->smca setting. No functional changes. Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Tony Luck <tony.luck@intel.com> Link: https://lkml.kernel.org/r/20210922165101.18951-4-bp@alien8.de
1 parent cbe1de1 commit 8121b8f

3 files changed

Lines changed: 42 additions & 75 deletions

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‎arch/x86/kernel/cpu/mce/amd.c‎

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -526,7 +526,7 @@ static u32 get_block_address(u32 current_addr, u32 low, u32 high,
526526
/* Fall back to method we used for older processors: */
527527
switch (block) {
528528
case 0:
529-
addr = msr_ops.misc(bank);
529+
addr = mca_msr_reg(bank, MCA_MISC);
530530
break;
531531
case 1:
532532
offset = ((low & MASK_BLKPTR_LO) >> 21);
@@ -978,8 +978,8 @@ static void log_error_deferred(unsigned int bank)
978978
{
979979
bool defrd;
980980

981-
defrd = _log_error_bank(bank, msr_ops.status(bank),
982-
msr_ops.addr(bank), 0);
981+
defrd = _log_error_bank(bank, mca_msr_reg(bank, MCA_STATUS),
982+
mca_msr_reg(bank, MCA_ADDR), 0);
983983

984984
if (!mce_flags.smca)
985985
return;
@@ -1009,7 +1009,7 @@ static void amd_deferred_error_interrupt(void)
10091009

10101010
static void log_error_thresholding(unsigned int bank, u64 misc)
10111011
{
1012-
_log_error_bank(bank, msr_ops.status(bank), msr_ops.addr(bank), misc);
1012+
_log_error_bank(bank, mca_msr_reg(bank, MCA_STATUS), mca_msr_reg(bank, MCA_ADDR), misc);
10131013
}
10141014

10151015
static void log_and_reset_block(struct threshold_block *block)
@@ -1397,7 +1397,7 @@ static int threshold_create_bank(struct threshold_bank **bp, unsigned int cpu,
13971397
}
13981398
}
13991399

1400-
err = allocate_threshold_blocks(cpu, b, bank, 0, msr_ops.misc(bank));
1400+
err = allocate_threshold_blocks(cpu, b, bank, 0, mca_msr_reg(bank, MCA_MISC));
14011401
if (err)
14021402
goto out_kobj;
14031403

‎arch/x86/kernel/cpu/mce/core.c‎

Lines changed: 31 additions & 64 deletions
Original file line numberDiff line numberDiff line change
@@ -176,53 +176,27 @@ void mce_unregister_decode_chain(struct notifier_block *nb)
176176
}
177177
EXPORT_SYMBOL_GPL(mce_unregister_decode_chain);
178178

179-
static inline u32 ctl_reg(int bank)
179+
u32 mca_msr_reg(int bank, enum mca_msr reg)
180180
{
181-
return MSR_IA32_MCx_CTL(bank);
182-
}
183-
184-
static inline u32 status_reg(int bank)
185-
{
186-
return MSR_IA32_MCx_STATUS(bank);
187-
}
188-
189-
static inline u32 addr_reg(int bank)
190-
{
191-
return MSR_IA32_MCx_ADDR(bank);
192-
}
193-
194-
static inline u32 misc_reg(int bank)
195-
{
196-
return MSR_IA32_MCx_MISC(bank);
197-
}
198-
199-
static inline u32 smca_ctl_reg(int bank)
200-
{
201-
return MSR_AMD64_SMCA_MCx_CTL(bank);
202-
}
203-
204-
static inline u32 smca_status_reg(int bank)
205-
{
206-
return MSR_AMD64_SMCA_MCx_STATUS(bank);
207-
}
181+
if (mce_flags.smca) {
182+
switch (reg) {
183+
case MCA_CTL: return MSR_AMD64_SMCA_MCx_CTL(bank);
184+
case MCA_ADDR: return MSR_AMD64_SMCA_MCx_ADDR(bank);
185+
case MCA_MISC: return MSR_AMD64_SMCA_MCx_MISC(bank);
186+
case MCA_STATUS: return MSR_AMD64_SMCA_MCx_STATUS(bank);
187+
}
188+
}
208189

209-
static inline u32 smca_addr_reg(int bank)
210-
{
211-
return MSR_AMD64_SMCA_MCx_ADDR(bank);
212-
}
190+
switch (reg) {
191+
case MCA_CTL: return MSR_IA32_MCx_CTL(bank);
192+
case MCA_ADDR: return MSR_IA32_MCx_ADDR(bank);
193+
case MCA_MISC: return MSR_IA32_MCx_MISC(bank);
194+
case MCA_STATUS: return MSR_IA32_MCx_STATUS(bank);
195+
}
213196

214-
static inline u32 smca_misc_reg(int bank)
215-
{
216-
return MSR_AMD64_SMCA_MCx_MISC(bank);
197+
return 0;
217198
}
218199

219-
struct mca_msr_regs msr_ops = {
220-
.ctl = ctl_reg,
221-
.status = status_reg,
222-
.addr = addr_reg,
223-
.misc = misc_reg
224-
};
225-
226200
static void __print_mce(struct mce *m)
227201
{
228202
pr_emerg(HW_ERR "CPU %d: Machine Check%s: %Lx Bank %d: %016Lx\n",
@@ -362,11 +336,11 @@ static int msr_to_offset(u32 msr)
362336

363337
if (msr == mca_cfg.rip_msr)
364338
return offsetof(struct mce, ip);
365-
if (msr == msr_ops.status(bank))
339+
if (msr == mca_msr_reg(bank, MCA_STATUS))
366340
return offsetof(struct mce, status);
367-
if (msr == msr_ops.addr(bank))
341+
if (msr == mca_msr_reg(bank, MCA_ADDR))
368342
return offsetof(struct mce, addr);
369-
if (msr == msr_ops.misc(bank))
343+
if (msr == mca_msr_reg(bank, MCA_MISC))
370344
return offsetof(struct mce, misc);
371345
if (msr == MSR_IA32_MCG_STATUS)
372346
return offsetof(struct mce, mcgstatus);
@@ -685,10 +659,10 @@ static struct notifier_block mce_default_nb = {
685659
static void mce_read_aux(struct mce *m, int i)
686660
{
687661
if (m->status & MCI_STATUS_MISCV)
688-
m->misc = mce_rdmsrl(msr_ops.misc(i));
662+
m->misc = mce_rdmsrl(mca_msr_reg(i, MCA_MISC));
689663

690664
if (m->status & MCI_STATUS_ADDRV) {
691-
m->addr = mce_rdmsrl(msr_ops.addr(i));
665+
m->addr = mce_rdmsrl(mca_msr_reg(i, MCA_ADDR));
692666

693667
/*
694668
* Mask the reported address by the reported granularity.
@@ -758,7 +732,7 @@ bool machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
758732
m.bank = i;
759733

760734
barrier();
761-
m.status = mce_rdmsrl(msr_ops.status(i));
735+
m.status = mce_rdmsrl(mca_msr_reg(i, MCA_STATUS));
762736

763737
/* If this entry is not valid, ignore it */
764738
if (!(m.status & MCI_STATUS_VAL))
@@ -826,7 +800,7 @@ bool machine_check_poll(enum mcp_flags flags, mce_banks_t *b)
826800
/*
827801
* Clear state for this bank.
828802
*/
829-
mce_wrmsrl(msr_ops.status(i), 0);
803+
mce_wrmsrl(mca_msr_reg(i, MCA_STATUS), 0);
830804
}
831805

832806
/*
@@ -851,7 +825,7 @@ static int mce_no_way_out(struct mce *m, char **msg, unsigned long *validp,
851825
int i;
852826

853827
for (i = 0; i < this_cpu_read(mce_num_banks); i++) {
854-
m->status = mce_rdmsrl(msr_ops.status(i));
828+
m->status = mce_rdmsrl(mca_msr_reg(i, MCA_STATUS));
855829
if (!(m->status & MCI_STATUS_VAL))
856830
continue;
857831

@@ -1144,7 +1118,7 @@ static void mce_clear_state(unsigned long *toclear)
11441118

11451119
for (i = 0; i < this_cpu_read(mce_num_banks); i++) {
11461120
if (test_bit(i, toclear))
1147-
mce_wrmsrl(msr_ops.status(i), 0);
1121+
mce_wrmsrl(mca_msr_reg(i, MCA_STATUS), 0);
11481122
}
11491123
}
11501124

@@ -1203,7 +1177,7 @@ static void __mc_scan_banks(struct mce *m, struct pt_regs *regs, struct mce *fin
12031177
m->addr = 0;
12041178
m->bank = i;
12051179

1206-
m->status = mce_rdmsrl(msr_ops.status(i));
1180+
m->status = mce_rdmsrl(mca_msr_reg(i, MCA_STATUS));
12071181
if (!(m->status & MCI_STATUS_VAL))
12081182
continue;
12091183

@@ -1708,8 +1682,8 @@ static void __mcheck_cpu_init_clear_banks(void)
17081682

17091683
if (!b->init)
17101684
continue;
1711-
wrmsrl(msr_ops.ctl(i), b->ctl);
1712-
wrmsrl(msr_ops.status(i), 0);
1685+
wrmsrl(mca_msr_reg(i, MCA_CTL), b->ctl);
1686+
wrmsrl(mca_msr_reg(i, MCA_STATUS), 0);
17131687
}
17141688
}
17151689

@@ -1735,7 +1709,7 @@ static void __mcheck_cpu_check_banks(void)
17351709
if (!b->init)
17361710
continue;
17371711

1738-
rdmsrl(msr_ops.ctl(i), msrval);
1712+
rdmsrl(mca_msr_reg(i, MCA_CTL), msrval);
17391713
b->init = !!msrval;
17401714
}
17411715
}
@@ -1894,13 +1868,6 @@ static void __mcheck_cpu_init_early(struct cpuinfo_x86 *c)
18941868
mce_flags.succor = !!cpu_has(c, X86_FEATURE_SUCCOR);
18951869
mce_flags.smca = !!cpu_has(c, X86_FEATURE_SMCA);
18961870
mce_flags.amd_threshold = 1;
1897-
1898-
if (mce_flags.smca) {
1899-
msr_ops.ctl = smca_ctl_reg;
1900-
msr_ops.status = smca_status_reg;
1901-
msr_ops.addr = smca_addr_reg;
1902-
msr_ops.misc = smca_misc_reg;
1903-
}
19041871
}
19051872
}
19061873

@@ -2254,7 +2221,7 @@ static void mce_disable_error_reporting(void)
22542221
struct mce_bank *b = &mce_banks[i];
22552222

22562223
if (b->init)
2257-
wrmsrl(msr_ops.ctl(i), 0);
2224+
wrmsrl(mca_msr_reg(i, MCA_CTL), 0);
22582225
}
22592226
return;
22602227
}
@@ -2606,7 +2573,7 @@ static void mce_reenable_cpu(void)
26062573
struct mce_bank *b = &mce_banks[i];
26072574

26082575
if (b->init)
2609-
wrmsrl(msr_ops.ctl(i), b->ctl);
2576+
wrmsrl(mca_msr_reg(i, MCA_CTL), b->ctl);
26102577
}
26112578
}
26122579

‎arch/x86/kernel/cpu/mce/internal.h‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -172,14 +172,14 @@ struct mce_vendor_flags {
172172

173173
extern struct mce_vendor_flags mce_flags;
174174

175-
struct mca_msr_regs {
176-
u32 (*ctl) (int bank);
177-
u32 (*status) (int bank);
178-
u32 (*addr) (int bank);
179-
u32 (*misc) (int bank);
175+
enum mca_msr {
176+
MCA_CTL,
177+
MCA_STATUS,
178+
MCA_ADDR,
179+
MCA_MISC,
180180
};
181181

182-
extern struct mca_msr_regs msr_ops;
182+
u32 mca_msr_reg(int bank, enum mca_msr reg);
183183

184184
/* Decide whether to add MCE record to MCE event pool or filter it out. */
185185
extern bool filter_mce(struct mce *m);

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