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krzkWim Van Sebroeck
krzk
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Wim Van Sebroeck
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dt-bindings: watchdog: indentation, quotes and white-space cleanup
Minor cleanup without functional impact: 1. Indent DTS examples to preferred four-spaces (more readable for DTS), 2. Drop unneeded quotes, 3. Add/drop blank lines to make the code readable. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Acked-by: Justin Chen <justinpopo6@gmail.com> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230415095112.51257-2-krzysztof.kozlowski@linaro.org Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
1 parent ab8da07 commit 819d141

13 files changed

Lines changed: 83 additions & 83 deletions

‎Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml‎

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@@ -2,8 +2,8 @@
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# Copyright 2019 BayLibre, SAS
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/watchdog/amlogic,meson-gxbb-wdt.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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$id: http://devicetree.org/schemas/watchdog/amlogic,meson-gxbb-wdt.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Meson GXBB SoCs Watchdog timer
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@@ -36,7 +36,7 @@ unevaluatedProperties: false
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examples:
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- |
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watchdog@98d0 {
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compatible = "amlogic,meson-gxbb-wdt";
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reg = <0x98d0 0x10>;
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clocks = <&xtal>;
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compatible = "amlogic,meson-gxbb-wdt";
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reg = <0x98d0 0x10>;
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clocks = <&xtal>;
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};

‎Documentation/devicetree/bindings/watchdog/arm,sbsa-gwdt.yaml‎

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@@ -40,7 +40,6 @@ unevaluatedProperties: false
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examples:
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- |
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watchdog@2a440000 {
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compatible = "arm,sbsa-gwdt";
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reg = <0x2a440000 0x1000>,

‎Documentation/devicetree/bindings/watchdog/arm,twd-wdt.yaml‎

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@@ -44,7 +44,7 @@ examples:
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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watchdog@2c000620 {
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compatible = "arm,arm11mp-twd-wdt";
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reg = <0x2c000620 0x20>;
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interrupts = <GIC_PPI 14 0xf01>;
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compatible = "arm,arm11mp-twd-wdt";
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reg = <0x2c000620 0x20>;
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interrupts = <GIC_PPI 14 0xf01>;
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};

‎Documentation/devicetree/bindings/watchdog/arm-smc-wdt.yaml‎

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@@ -16,6 +16,7 @@ properties:
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compatible:
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enum:
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- arm,smc-wdt
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arm,smc-id:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: |
@@ -30,9 +31,9 @@ unevaluatedProperties: false
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examples:
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- |
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watchdog {
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compatible = "arm,smc-wdt";
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arm,smc-id = <0x82003D06>;
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timeout-sec = <15>;
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compatible = "arm,smc-wdt";
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arm,smc-id = <0x82003D06>;
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timeout-sec = <15>;
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};
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...

‎Documentation/devicetree/bindings/watchdog/atmel,sama5d4-wdt.yaml‎

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@@ -65,13 +65,13 @@ examples:
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#include <dt-bindings/interrupt-controller/irq.h>
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watchdog@fc068640 {
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compatible = "atmel,sama5d4-wdt";
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reg = <0xfc068640 0x10>;
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interrupts = <4 IRQ_TYPE_LEVEL_HIGH 5>;
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timeout-sec = <10>;
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atmel,watchdog-type = "hardware";
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atmel,dbg-halt;
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atmel,idle-halt;
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compatible = "atmel,sama5d4-wdt";
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reg = <0xfc068640 0x10>;
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interrupts = <4 IRQ_TYPE_LEVEL_HIGH 5>;
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timeout-sec = <10>;
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atmel,watchdog-type = "hardware";
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atmel,dbg-halt;
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atmel,idle-halt;
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};
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...

‎Documentation/devicetree/bindings/watchdog/brcm,bcm7038-wdt.yaml‎

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@@ -37,7 +37,7 @@ required:
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examples:
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- |
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watchdog@f040a7e8 {
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compatible = "brcm,bcm7038-wdt";
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reg = <0xf040a7e8 0x16>;
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clocks = <&upg_fixed>;
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compatible = "brcm,bcm7038-wdt";
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reg = <0xf040a7e8 0x16>;
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clocks = <&upg_fixed>;
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};

‎Documentation/devicetree/bindings/watchdog/faraday,ftwdt010.yaml‎

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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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watchdog@41000000 {
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compatible = "faraday,ftwdt010";
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reg = <0x41000000 0x1000>;
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interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
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timeout-sec = <5>;
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compatible = "faraday,ftwdt010";
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reg = <0x41000000 0x1000>;
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interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
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timeout-sec = <5>;
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};
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watchdog: watchdog@98500000 {
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compatible = "moxa,moxart-watchdog", "faraday,ftwdt010";
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reg = <0x98500000 0x10>;
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clocks = <&clk_apb>;
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clock-names = "PCLK";
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compatible = "moxa,moxart-watchdog", "faraday,ftwdt010";
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reg = <0x98500000 0x10>;
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clocks = <&clk_apb>;
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clock-names = "PCLK";
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};
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...

‎Documentation/devicetree/bindings/watchdog/mediatek,mt7621-wdt.yaml‎

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examples:
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- |
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watchdog@100 {
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compatible = "mediatek,mt7621-wdt";
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reg = <0x100 0x100>;
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mediatek,sysctl = <&sysc>;
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compatible = "mediatek,mt7621-wdt";
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reg = <0x100 0x100>;
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mediatek,sysctl = <&sysc>;
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};

‎Documentation/devicetree/bindings/watchdog/qcom-wdt.yaml‎

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@@ -116,26 +116,26 @@ examples:
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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watchdog@17c10000 {
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compatible = "qcom,apss-wdt-sm8150", "qcom,kpss-wdt";
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reg = <0x17c10000 0x1000>;
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clocks = <&sleep_clk>;
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
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timeout-sec = <10>;
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compatible = "qcom,apss-wdt-sm8150", "qcom,kpss-wdt";
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reg = <0x17c10000 0x1000>;
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clocks = <&sleep_clk>;
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
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timeout-sec = <10>;
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};
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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watchdog@200a000 {
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compatible = "qcom,kpss-wdt-ipq8064", "qcom,kpss-timer", "qcom,msm-timer";
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interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
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<GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
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<GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
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<GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
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<GIC_PPI 5 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
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reg = <0x0200a000 0x100>;
137-
clock-frequency = <25000000>;
138-
clocks = <&sleep_clk>;
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clock-names = "sleep";
140-
cpu-offset = <0x80000>;
130+
compatible = "qcom,kpss-wdt-ipq8064", "qcom,kpss-timer", "qcom,msm-timer";
131+
interrupts = <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
132+
<GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
133+
<GIC_PPI 3 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
134+
<GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>,
135+
<GIC_PPI 5 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
136+
reg = <0x0200a000 0x100>;
137+
clock-frequency = <25000000>;
138+
clocks = <&sleep_clk>;
139+
clock-names = "sleep";
140+
cpu-offset = <0x80000>;
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};

‎Documentation/devicetree/bindings/watchdog/renesas,wdt.yaml‎

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@@ -177,11 +177,11 @@ examples:
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#include <dt-bindings/power/r8a7795-sysc.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
179179
wdt0: watchdog@e6020000 {
180-
compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
181-
reg = <0xe6020000 0x0c>;
182-
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
183-
clocks = <&cpg CPG_MOD 402>;
184-
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
185-
resets = <&cpg 402>;
186-
timeout-sec = <60>;
180+
compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt";
181+
reg = <0xe6020000 0x0c>;
182+
interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
183+
clocks = <&cpg CPG_MOD 402>;
184+
power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
185+
resets = <&cpg 402>;
186+
timeout-sec = <60>;
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};

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