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mwalleambarus
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mtd: spi-nor: move all spansion specifics into spansion.c
The clear status register flags is only available on spansion flashes. Move all the functions around that into the spanion module. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Tested-by: Pratyush Yadav <p.yadav@ti.com> # on mt35xu512aba, s28hs512t Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20220223134358.1914798-29-michael@walle.cc
1 parent 6235ff0 commit 837d518

3 files changed

Lines changed: 70 additions & 50 deletions

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drivers/mtd/spi-nor/core.c

Lines changed: 0 additions & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -554,33 +554,6 @@ int spi_nor_write_ear(struct spi_nor *nor, u8 ear)
554554
return ret;
555555
}
556556

557-
/**
558-
* spi_nor_clear_sr() - Clear the Status Register.
559-
* @nor: pointer to 'struct spi_nor'.
560-
*/
561-
static void spi_nor_clear_sr(struct spi_nor *nor)
562-
{
563-
int ret;
564-
565-
if (nor->spimem) {
566-
struct spi_mem_op op =
567-
SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CLSR, 0),
568-
SPI_MEM_OP_NO_ADDR,
569-
SPI_MEM_OP_NO_DUMMY,
570-
SPI_MEM_OP_NO_DATA);
571-
572-
spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
573-
574-
ret = spi_mem_exec_op(nor->spimem, &op);
575-
} else {
576-
ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_CLSR,
577-
NULL, 0);
578-
}
579-
580-
if (ret)
581-
dev_dbg(nor->dev, "error %d clearing SR\n", ret);
582-
}
583-
584557
/**
585558
* spi_nor_sr_ready() - Query the Status Register to see if the flash is ready
586559
* for new commands.
@@ -595,28 +568,6 @@ int spi_nor_sr_ready(struct spi_nor *nor)
595568
if (ret)
596569
return ret;
597570

598-
if (nor->flags & SNOR_F_USE_CLSR &&
599-
nor->bouncebuf[0] & (SR_E_ERR | SR_P_ERR)) {
600-
if (nor->bouncebuf[0] & SR_E_ERR)
601-
dev_err(nor->dev, "Erase Error occurred\n");
602-
else
603-
dev_err(nor->dev, "Programming Error occurred\n");
604-
605-
spi_nor_clear_sr(nor);
606-
607-
/*
608-
* WEL bit remains set to one when an erase or page program
609-
* error occurs. Issue a Write Disable command to protect
610-
* against inadvertent writes that can possibly corrupt the
611-
* contents of the memory.
612-
*/
613-
ret = spi_nor_write_disable(nor);
614-
if (ret)
615-
return ret;
616-
617-
return -EIO;
618-
}
619-
620571
return !(nor->bouncebuf[0] & SR_WIP);
621572
}
622573

drivers/mtd/spi-nor/spansion.c

Lines changed: 70 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@
88

99
#include "core.h"
1010

11+
#define SPINOR_OP_CLSR 0x30 /* Clear status register 1 */
1112
#define SPINOR_OP_RD_ANY_REG 0x65 /* Read any register */
1213
#define SPINOR_OP_WR_ANY_REG 0x71 /* Write any register */
1314
#define SPINOR_REG_CYPRESS_CFR2V 0x00800003
@@ -294,6 +295,72 @@ static const struct flash_info spansion_nor_parts[] = {
294295
},
295296
};
296297

298+
/**
299+
* spi_nor_clear_sr() - Clear the Status Register.
300+
* @nor: pointer to 'struct spi_nor'.
301+
*/
302+
static void spi_nor_clear_sr(struct spi_nor *nor)
303+
{
304+
int ret;
305+
306+
if (nor->spimem) {
307+
struct spi_mem_op op =
308+
SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CLSR, 0),
309+
SPI_MEM_OP_NO_ADDR,
310+
SPI_MEM_OP_NO_DUMMY,
311+
SPI_MEM_OP_NO_DATA);
312+
313+
spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);
314+
315+
ret = spi_mem_exec_op(nor->spimem, &op);
316+
} else {
317+
ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_CLSR,
318+
NULL, 0);
319+
}
320+
321+
if (ret)
322+
dev_dbg(nor->dev, "error %d clearing SR\n", ret);
323+
}
324+
325+
/**
326+
* spi_nor_sr_ready_and_clear() - Query the Status Register to see if the flash
327+
* is ready for new commands and clear it if there are any errors.
328+
* @nor: pointer to 'struct spi_nor'.
329+
*
330+
* Return: 1 if ready, 0 if not ready, -errno on errors.
331+
*/
332+
static int spi_nor_sr_ready_and_clear(struct spi_nor *nor)
333+
{
334+
int ret;
335+
336+
ret = spi_nor_read_sr(nor, nor->bouncebuf);
337+
if (ret)
338+
return ret;
339+
340+
if (nor->bouncebuf[0] & (SR_E_ERR | SR_P_ERR)) {
341+
if (nor->bouncebuf[0] & SR_E_ERR)
342+
dev_err(nor->dev, "Erase Error occurred\n");
343+
else
344+
dev_err(nor->dev, "Programming Error occurred\n");
345+
346+
spi_nor_clear_sr(nor);
347+
348+
/*
349+
* WEL bit remains set to one when an erase or page program
350+
* error occurs. Issue a Write Disable command to protect
351+
* against inadvertent writes that can possibly corrupt the
352+
* contents of the memory.
353+
*/
354+
ret = spi_nor_write_disable(nor);
355+
if (ret)
356+
return ret;
357+
358+
return -EIO;
359+
}
360+
361+
return !(nor->bouncebuf[0] & SR_WIP);
362+
}
363+
297364
static void spansion_nor_late_init(struct spi_nor *nor)
298365
{
299366
if (nor->params->size > SZ_16M) {
@@ -302,6 +369,9 @@ static void spansion_nor_late_init(struct spi_nor *nor)
302369
nor->erase_opcode = SPINOR_OP_SE;
303370
nor->mtd.erasesize = nor->info->sector_size;
304371
}
372+
373+
if (nor->flags & SNOR_F_USE_CLSR)
374+
nor->params->ready = spi_nor_sr_ready_and_clear;
305375
}
306376

307377
static const struct spi_nor_fixups spansion_nor_fixups = {

include/linux/mtd/spi-nor.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -90,7 +90,6 @@
9090

9191
/* Used for Spansion flashes only. */
9292
#define SPINOR_OP_BRWR 0x17 /* Bank register write */
93-
#define SPINOR_OP_CLSR 0x30 /* Clear status register 1 */
9493

9594
/* Used for Micron flashes only. */
9695
#define SPINOR_OP_RD_EVCR 0x65 /* Read EVCR register */

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