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brooniewilldeacon
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arm64: Define CPACR_EL1_FPEN similarly to other floating point controls
The base floating point, SVE and SME all have enable controls for EL0 and EL1 in CPACR_EL1 which have a similar layout and function. Currently the basic floating point enable FPEN is defined differently to the SVE control, specified as a single define in kvm_arm.h rather than in sysreg.h. Move the define to sysreg.h and provide separate EL0 and EL1 control bits so code managing the different floating point enables can look consistent. Signed-off-by: Mark Brown <broonie@kernel.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/r/20220207152109.197566-2-broonie@kernel.org Signed-off-by: Will Deacon <will@kernel.org>
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arch/arm64/include/asm/kvm_arm.h

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ECN(SOFTSTP_CUR), ECN(WATCHPT_LOW), ECN(WATCHPT_CUR), \
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ECN(BKPT32), ECN(VECTOR32), ECN(BRK64)
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#define CPACR_EL1_FPEN (3 << 20)
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#define CPACR_EL1_TTA (1 << 28)
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#define CPACR_EL1_DEFAULT (CPACR_EL1_FPEN | CPACR_EL1_ZEN_EL1EN)
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arch/arm64/include/asm/sysreg.h

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#define ZCR_ELx_LEN_SIZE 9
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#define ZCR_ELx_LEN_MASK 0x1ff
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#define CPACR_EL1_FPEN_EL1EN (BIT(20)) /* enable EL1 access */
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#define CPACR_EL1_FPEN_EL0EN (BIT(21)) /* enable EL0 access, if EL1EN set */
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#define CPACR_EL1_FPEN (CPACR_EL1_FPEN_EL1EN | CPACR_EL1_FPEN_EL0EN)
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#define CPACR_EL1_ZEN_EL1EN (BIT(16)) /* enable EL1 access */
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#define CPACR_EL1_ZEN_EL0EN (BIT(17)) /* enable EL0 access, if EL1EN set */
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#define CPACR_EL1_ZEN (CPACR_EL1_ZEN_EL1EN | CPACR_EL1_ZEN_EL0EN)

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