|
460 | 460 |
|
461 | 461 | &pio { |
462 | 462 | aud_pins_default: audiopins { |
463 | | - pins_bus { |
| 463 | + pins-bus { |
464 | 464 | pinmux = <PINMUX_GPIO97__FUNC_I2S2_MCK>, |
465 | 465 | <PINMUX_GPIO98__FUNC_I2S2_BCK>, |
466 | 466 | <PINMUX_GPIO101__FUNC_I2S2_LRCK>, |
|
482 | 482 | }; |
483 | 483 |
|
484 | 484 | aud_pins_tdm_out_on: audiotdmouton { |
485 | | - pins_bus { |
| 485 | + pins-bus { |
486 | 486 | pinmux = <PINMUX_GPIO169__FUNC_TDM_BCK_2ND>, |
487 | 487 | <PINMUX_GPIO170__FUNC_TDM_LRCK_2ND>, |
488 | 488 | <PINMUX_GPIO171__FUNC_TDM_DATA0_2ND>, |
|
494 | 494 | }; |
495 | 495 |
|
496 | 496 | aud_pins_tdm_out_off: audiotdmoutoff { |
497 | | - pins_bus { |
| 497 | + pins-bus { |
498 | 498 | pinmux = <PINMUX_GPIO169__FUNC_GPIO169>, |
499 | 499 | <PINMUX_GPIO170__FUNC_GPIO170>, |
500 | 500 | <PINMUX_GPIO171__FUNC_GPIO171>, |
|
508 | 508 | }; |
509 | 509 |
|
510 | 510 | bt_pins: bt-pins { |
511 | | - pins_bt_en { |
| 511 | + pins-bt-en { |
512 | 512 | pinmux = <PINMUX_GPIO120__FUNC_GPIO120>; |
513 | 513 | output-low; |
514 | 514 | }; |
515 | 515 | }; |
516 | 516 |
|
517 | | - ec_ap_int_odl: ec_ap_int_odl { |
| 517 | + ec_ap_int_odl: ec-ap-int-odl { |
518 | 518 | pins1 { |
519 | 519 | pinmux = <PINMUX_GPIO151__FUNC_GPIO151>; |
520 | 520 | input-enable; |
521 | 521 | bias-pull-up; |
522 | 522 | }; |
523 | 523 | }; |
524 | 524 |
|
525 | | - h1_int_od_l: h1_int_od_l { |
| 525 | + h1_int_od_l: h1-int-od-l { |
526 | 526 | pins1 { |
527 | 527 | pinmux = <PINMUX_GPIO153__FUNC_GPIO153>; |
528 | 528 | input-enable; |
529 | 529 | }; |
530 | 530 | }; |
531 | 531 |
|
532 | 532 | i2c0_pins: i2c0 { |
533 | | - pins_bus { |
| 533 | + pins-bus { |
534 | 534 | pinmux = <PINMUX_GPIO82__FUNC_SDA0>, |
535 | 535 | <PINMUX_GPIO83__FUNC_SCL0>; |
536 | 536 | mediatek,pull-up-adv = <3>; |
|
539 | 539 | }; |
540 | 540 |
|
541 | 541 | i2c1_pins: i2c1 { |
542 | | - pins_bus { |
| 542 | + pins-bus { |
543 | 543 | pinmux = <PINMUX_GPIO81__FUNC_SDA1>, |
544 | 544 | <PINMUX_GPIO84__FUNC_SCL1>; |
545 | 545 | mediatek,pull-up-adv = <3>; |
|
548 | 548 | }; |
549 | 549 |
|
550 | 550 | i2c2_pins: i2c2 { |
551 | | - pins_bus { |
| 551 | + pins-bus { |
552 | 552 | pinmux = <PINMUX_GPIO103__FUNC_SCL2>, |
553 | 553 | <PINMUX_GPIO104__FUNC_SDA2>; |
554 | 554 | bias-disable; |
|
557 | 557 | }; |
558 | 558 |
|
559 | 559 | i2c3_pins: i2c3 { |
560 | | - pins_bus { |
| 560 | + pins-bus { |
561 | 561 | pinmux = <PINMUX_GPIO50__FUNC_SCL3>, |
562 | 562 | <PINMUX_GPIO51__FUNC_SDA3>; |
563 | 563 | mediatek,pull-up-adv = <3>; |
|
566 | 566 | }; |
567 | 567 |
|
568 | 568 | i2c4_pins: i2c4 { |
569 | | - pins_bus { |
| 569 | + pins-bus { |
570 | 570 | pinmux = <PINMUX_GPIO105__FUNC_SCL4>, |
571 | 571 | <PINMUX_GPIO106__FUNC_SDA4>; |
572 | 572 | bias-disable; |
|
575 | 575 | }; |
576 | 576 |
|
577 | 577 | i2c5_pins: i2c5 { |
578 | | - pins_bus { |
| 578 | + pins-bus { |
579 | 579 | pinmux = <PINMUX_GPIO48__FUNC_SCL5>, |
580 | 580 | <PINMUX_GPIO49__FUNC_SDA5>; |
581 | 581 | mediatek,pull-up-adv = <3>; |
|
584 | 584 | }; |
585 | 585 |
|
586 | 586 | i2c6_pins: i2c6 { |
587 | | - pins_bus { |
| 587 | + pins-bus { |
588 | 588 | pinmux = <PINMUX_GPIO11__FUNC_SCL6>, |
589 | 589 | <PINMUX_GPIO12__FUNC_SDA6>; |
590 | 590 | bias-disable; |
591 | 591 | }; |
592 | 592 | }; |
593 | 593 |
|
594 | 594 | mmc0_pins_default: mmc0-pins-default { |
595 | | - pins_cmd_dat { |
| 595 | + pins-cmd-dat { |
596 | 596 | pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>, |
597 | 597 | <PINMUX_GPIO128__FUNC_MSDC0_DAT1>, |
598 | 598 | <PINMUX_GPIO125__FUNC_MSDC0_DAT2>, |
|
607 | 607 | mediatek,pull-up-adv = <01>; |
608 | 608 | }; |
609 | 609 |
|
610 | | - pins_clk { |
| 610 | + pins-clk { |
611 | 611 | pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>; |
612 | 612 | drive-strength = <MTK_DRIVE_14mA>; |
613 | 613 | mediatek,pull-down-adv = <10>; |
614 | 614 | }; |
615 | 615 |
|
616 | | - pins_rst { |
| 616 | + pins-rst { |
617 | 617 | pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>; |
618 | 618 | drive-strength = <MTK_DRIVE_14mA>; |
619 | 619 | mediatek,pull-down-adv = <01>; |
620 | 620 | }; |
621 | 621 | }; |
622 | 622 |
|
623 | 623 | mmc0_pins_uhs: mmc0-pins-uhs { |
624 | | - pins_cmd_dat { |
| 624 | + pins-cmd-dat { |
625 | 625 | pinmux = <PINMUX_GPIO123__FUNC_MSDC0_DAT0>, |
626 | 626 | <PINMUX_GPIO128__FUNC_MSDC0_DAT1>, |
627 | 627 | <PINMUX_GPIO125__FUNC_MSDC0_DAT2>, |
|
636 | 636 | mediatek,pull-up-adv = <01>; |
637 | 637 | }; |
638 | 638 |
|
639 | | - pins_clk { |
| 639 | + pins-clk { |
640 | 640 | pinmux = <PINMUX_GPIO124__FUNC_MSDC0_CLK>; |
641 | 641 | drive-strength = <MTK_DRIVE_14mA>; |
642 | 642 | mediatek,pull-down-adv = <10>; |
643 | 643 | }; |
644 | 644 |
|
645 | | - pins_ds { |
| 645 | + pins-ds { |
646 | 646 | pinmux = <PINMUX_GPIO131__FUNC_MSDC0_DSL>; |
647 | 647 | drive-strength = <MTK_DRIVE_14mA>; |
648 | 648 | mediatek,pull-down-adv = <10>; |
649 | 649 | }; |
650 | 650 |
|
651 | | - pins_rst { |
| 651 | + pins-rst { |
652 | 652 | pinmux = <PINMUX_GPIO133__FUNC_MSDC0_RSTB>; |
653 | 653 | drive-strength = <MTK_DRIVE_14mA>; |
654 | 654 | mediatek,pull-up-adv = <01>; |
655 | 655 | }; |
656 | 656 | }; |
657 | 657 |
|
658 | 658 | mmc1_pins_default: mmc1-pins-default { |
659 | | - pins_cmd_dat { |
| 659 | + pins-cmd-dat { |
660 | 660 | pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>, |
661 | 661 | <PINMUX_GPIO32__FUNC_MSDC1_DAT0>, |
662 | 662 | <PINMUX_GPIO34__FUNC_MSDC1_DAT1>, |
|
666 | 666 | mediatek,pull-up-adv = <10>; |
667 | 667 | }; |
668 | 668 |
|
669 | | - pins_clk { |
| 669 | + pins-clk { |
670 | 670 | pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>; |
671 | 671 | input-enable; |
672 | 672 | mediatek,pull-down-adv = <10>; |
673 | 673 | }; |
674 | 674 | }; |
675 | 675 |
|
676 | 676 | mmc1_pins_uhs: mmc1-pins-uhs { |
677 | | - pins_cmd_dat { |
| 677 | + pins-cmd-dat { |
678 | 678 | pinmux = <PINMUX_GPIO31__FUNC_MSDC1_CMD>, |
679 | 679 | <PINMUX_GPIO32__FUNC_MSDC1_DAT0>, |
680 | 680 | <PINMUX_GPIO34__FUNC_MSDC1_DAT1>, |
|
685 | 685 | mediatek,pull-up-adv = <10>; |
686 | 686 | }; |
687 | 687 |
|
688 | | - pins_clk { |
| 688 | + pins-clk { |
689 | 689 | pinmux = <PINMUX_GPIO29__FUNC_MSDC1_CLK>; |
690 | 690 | drive-strength = <MTK_DRIVE_8mA>; |
691 | 691 | mediatek,pull-down-adv = <10>; |
692 | 692 | input-enable; |
693 | 693 | }; |
694 | 694 | }; |
695 | 695 |
|
696 | | - panel_pins_default: panel_pins_default { |
697 | | - panel_reset { |
| 696 | + panel_pins_default: panel-pins-default { |
| 697 | + panel-reset { |
698 | 698 | pinmux = <PINMUX_GPIO45__FUNC_GPIO45>; |
699 | 699 | output-low; |
700 | 700 | bias-pull-up; |
701 | 701 | }; |
702 | 702 | }; |
703 | 703 |
|
704 | | - pwm0_pin_default: pwm0_pin_default { |
| 704 | + pwm0_pin_default: pwm0-pin-default { |
705 | 705 | pins1 { |
706 | 706 | pinmux = <PINMUX_GPIO176__FUNC_GPIO176>; |
707 | 707 | output-high; |
|
713 | 713 | }; |
714 | 714 |
|
715 | 715 | scp_pins: scp { |
716 | | - pins_scp_uart { |
| 716 | + pins-scp-uart { |
717 | 717 | pinmux = <PINMUX_GPIO110__FUNC_TP_URXD1_AO>, |
718 | 718 | <PINMUX_GPIO112__FUNC_TP_UTXD1_AO>; |
719 | 719 | }; |
720 | 720 | }; |
721 | 721 |
|
722 | 722 | spi0_pins: spi0 { |
723 | | - pins_spi { |
| 723 | + pins-spi { |
724 | 724 | pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>, |
725 | 725 | <PINMUX_GPIO86__FUNC_GPIO86>, |
726 | 726 | <PINMUX_GPIO87__FUNC_SPI0_MO>, |
|
730 | 730 | }; |
731 | 731 |
|
732 | 732 | spi1_pins: spi1 { |
733 | | - pins_spi { |
| 733 | + pins-spi { |
734 | 734 | pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>, |
735 | 735 | <PINMUX_GPIO162__FUNC_SPI1_A_CSB>, |
736 | 736 | <PINMUX_GPIO163__FUNC_SPI1_A_MO>, |
|
740 | 740 | }; |
741 | 741 |
|
742 | 742 | spi2_pins: spi2 { |
743 | | - pins_spi { |
| 743 | + pins-spi { |
744 | 744 | pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>, |
745 | 745 | <PINMUX_GPIO1__FUNC_SPI2_MO>, |
746 | 746 | <PINMUX_GPIO2__FUNC_SPI2_CLK>; |
747 | 747 | bias-disable; |
748 | 748 | }; |
749 | | - pins_spi_mi { |
| 749 | + pins-spi-mi { |
750 | 750 | pinmux = <PINMUX_GPIO94__FUNC_SPI2_MI>; |
751 | 751 | mediatek,pull-down-adv = <00>; |
752 | 752 | }; |
753 | 753 | }; |
754 | 754 |
|
755 | 755 | spi3_pins: spi3 { |
756 | | - pins_spi { |
| 756 | + pins-spi { |
757 | 757 | pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>, |
758 | 758 | <PINMUX_GPIO22__FUNC_SPI3_CSB>, |
759 | 759 | <PINMUX_GPIO23__FUNC_SPI3_MO>, |
|
763 | 763 | }; |
764 | 764 |
|
765 | 765 | spi4_pins: spi4 { |
766 | | - pins_spi { |
| 766 | + pins-spi { |
767 | 767 | pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>, |
768 | 768 | <PINMUX_GPIO18__FUNC_SPI4_CSB>, |
769 | 769 | <PINMUX_GPIO19__FUNC_SPI4_MO>, |
|
773 | 773 | }; |
774 | 774 |
|
775 | 775 | spi5_pins: spi5 { |
776 | | - pins_spi { |
| 776 | + pins-spi { |
777 | 777 | pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>, |
778 | 778 | <PINMUX_GPIO14__FUNC_SPI5_CSB>, |
779 | 779 | <PINMUX_GPIO15__FUNC_SPI5_MO>, |
|
783 | 783 | }; |
784 | 784 |
|
785 | 785 | uart0_pins_default: uart0-pins-default { |
786 | | - pins_rx { |
| 786 | + pins-rx { |
787 | 787 | pinmux = <PINMUX_GPIO95__FUNC_URXD0>; |
788 | 788 | input-enable; |
789 | 789 | bias-pull-up; |
790 | 790 | }; |
791 | | - pins_tx { |
| 791 | + pins-tx { |
792 | 792 | pinmux = <PINMUX_GPIO96__FUNC_UTXD0>; |
793 | 793 | }; |
794 | 794 | }; |
795 | 795 |
|
796 | 796 | uart1_pins_default: uart1-pins-default { |
797 | | - pins_rx { |
| 797 | + pins-rx { |
798 | 798 | pinmux = <PINMUX_GPIO121__FUNC_URXD1>; |
799 | 799 | input-enable; |
800 | 800 | bias-pull-up; |
801 | 801 | }; |
802 | | - pins_tx { |
| 802 | + pins-tx { |
803 | 803 | pinmux = <PINMUX_GPIO115__FUNC_UTXD1>; |
804 | 804 | }; |
805 | | - pins_rts { |
| 805 | + pins-rts { |
806 | 806 | pinmux = <PINMUX_GPIO47__FUNC_URTS1>; |
807 | 807 | output-enable; |
808 | 808 | }; |
809 | | - pins_cts { |
| 809 | + pins-cts { |
810 | 810 | pinmux = <PINMUX_GPIO46__FUNC_UCTS1>; |
811 | 811 | input-enable; |
812 | 812 | }; |
813 | 813 | }; |
814 | 814 |
|
815 | 815 | uart1_pins_sleep: uart1-pins-sleep { |
816 | | - pins_rx { |
| 816 | + pins-rx { |
817 | 817 | pinmux = <PINMUX_GPIO121__FUNC_GPIO121>; |
818 | 818 | input-enable; |
819 | 819 | bias-pull-up; |
820 | 820 | }; |
821 | | - pins_tx { |
| 821 | + pins-tx { |
822 | 822 | pinmux = <PINMUX_GPIO115__FUNC_UTXD1>; |
823 | 823 | }; |
824 | | - pins_rts { |
| 824 | + pins-rts { |
825 | 825 | pinmux = <PINMUX_GPIO47__FUNC_URTS1>; |
826 | 826 | output-enable; |
827 | 827 | }; |
828 | | - pins_cts { |
| 828 | + pins-cts { |
829 | 829 | pinmux = <PINMUX_GPIO46__FUNC_UCTS1>; |
830 | 830 | input-enable; |
831 | 831 | }; |
832 | 832 | }; |
833 | 833 |
|
834 | 834 | wifi_pins_pwrseq: wifi-pins-pwrseq { |
835 | | - pins_wifi_enable { |
| 835 | + pins-wifi-enable { |
836 | 836 | pinmux = <PINMUX_GPIO119__FUNC_GPIO119>; |
837 | 837 | output-low; |
838 | 838 | }; |
839 | 839 | }; |
840 | 840 |
|
841 | 841 | wifi_pins_wakeup: wifi-pins-wakeup { |
842 | | - pins_wifi_wakeup { |
| 842 | + pins-wifi-wakeup { |
843 | 843 | pinmux = <PINMUX_GPIO113__FUNC_GPIO113>; |
844 | 844 | input-enable; |
845 | 845 | }; |
|
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