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shimodaykwilczynski
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PCI: dwc: Add missing PCI_EXP_LNKCAP_MLW handling
Update dw_pcie_link_set_max_link_width() to set PCI_EXP_LNKCAP_MLW. In accordance with the DW PCIe RC/EP HW manuals [1,2,3,...] aside with the PORT_LINK_CTRL_OFF.LINK_CAPABLE and GEN2_CTRL_OFF.NUM_OF_LANES[8:0] field there is another one which needs to be updated. It's LINK_CAPABILITIES_REG.PCIE_CAP_MAX_LINK_WIDTH. If it isn't done at the very least the maximum link-width capability CSR won't expose the actual maximum capability. [1] DesignWare Cores PCI Express Controller Databook - DWC PCIe Root Port, Version 4.60a, March 2015, p.1032 [2] DesignWare Cores PCI Express Controller Databook - DWC PCIe Root Port, Version 4.70a, March 2016, p.1065 [3] DesignWare Cores PCI Express Controller Databook - DWC PCIe Root Port, Version 4.90a, March 2016, p.1057 ... [X] DesignWare Cores PCI Express Controller Databook - DWC PCIe Endpoint, Version 5.40a, March 2019, p.1396 [X+1] DesignWare Cores PCI Express Controller Databook - DWC PCIe Root Port, Version 5.40a, March 2019, p.1266 Suggested-by: Serge Semin <fancer.lancer@gmail.com> Link: https://lore.kernel.org/linux-pci/20231018085631.1121289-4-yoshihiro.shimoda.uh@renesas.com Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
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Lines changed: 8 additions & 1 deletion

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drivers/pci/controller/dwc/pcie-designware.c

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -734,7 +734,8 @@ static void dw_pcie_link_set_max_speed(struct dw_pcie *pci, u32 link_gen)
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static void dw_pcie_link_set_max_link_width(struct dw_pcie *pci, u32 num_lanes)
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{
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u32 lwsc, plc;
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u32 lnkcap, lwsc, plc;
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u8 cap;
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if (!num_lanes)
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return;
@@ -770,6 +771,12 @@ static void dw_pcie_link_set_max_link_width(struct dw_pcie *pci, u32 num_lanes)
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}
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dw_pcie_writel_dbi(pci, PCIE_PORT_LINK_CONTROL, plc);
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dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, lwsc);
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cap = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
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lnkcap = dw_pcie_readl_dbi(pci, cap + PCI_EXP_LNKCAP);
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lnkcap &= ~PCI_EXP_LNKCAP_MLW;
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lnkcap |= FIELD_PREP(PCI_EXP_LNKCAP_MLW, num_lanes);
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dw_pcie_writel_dbi(pci, cap + PCI_EXP_LNKCAP, lnkcap);
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}
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void dw_pcie_iatu_detect(struct dw_pcie *pci)

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