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clk: at91: sckc: switch to parent_data/parent_hw
Switch slow clock drivers to use parent_data and parent_hw. With this parent-child relation is described with pointers rather than strings. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Reviewed-by: Maxime Ripard <mripard@kernel.org> Link: https://lore.kernel.org/r/20230615093227.576102-10-claudiu.beznea@microchip.com
1 parent a673dae commit 8aa1db9

1 file changed

Lines changed: 48 additions & 27 deletions

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drivers/clk/at91/sckc.c

Lines changed: 48 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -117,17 +117,17 @@ static const struct clk_ops slow_osc_ops = {
117117
static struct clk_hw * __init
118118
at91_clk_register_slow_osc(void __iomem *sckcr,
119119
const char *name,
120-
const char *parent_name,
120+
const struct clk_parent_data *parent_data,
121121
unsigned long startup,
122122
bool bypass,
123123
const struct clk_slow_bits *bits)
124124
{
125125
struct clk_slow_osc *osc;
126126
struct clk_hw *hw;
127-
struct clk_init_data init;
127+
struct clk_init_data init = {};
128128
int ret;
129129

130-
if (!sckcr || !name || !parent_name)
130+
if (!sckcr || !name || !parent_data)
131131
return ERR_PTR(-EINVAL);
132132

133133
osc = kzalloc(sizeof(*osc), GFP_KERNEL);
@@ -136,7 +136,7 @@ at91_clk_register_slow_osc(void __iomem *sckcr,
136136

137137
init.name = name;
138138
init.ops = &slow_osc_ops;
139-
init.parent_names = &parent_name;
139+
init.parent_data = parent_data;
140140
init.num_parents = 1;
141141
init.flags = CLK_IGNORE_UNUSED;
142142

@@ -317,16 +317,16 @@ static const struct clk_ops sam9x5_slow_ops = {
317317
static struct clk_hw * __init
318318
at91_clk_register_sam9x5_slow(void __iomem *sckcr,
319319
const char *name,
320-
const char **parent_names,
320+
const struct clk_hw **parent_hws,
321321
int num_parents,
322322
const struct clk_slow_bits *bits)
323323
{
324324
struct clk_sam9x5_slow *slowck;
325325
struct clk_hw *hw;
326-
struct clk_init_data init;
326+
struct clk_init_data init = {};
327327
int ret;
328328

329-
if (!sckcr || !name || !parent_names || !num_parents)
329+
if (!sckcr || !name || !parent_hws || !num_parents)
330330
return ERR_PTR(-EINVAL);
331331

332332
slowck = kzalloc(sizeof(*slowck), GFP_KERNEL);
@@ -335,7 +335,7 @@ at91_clk_register_sam9x5_slow(void __iomem *sckcr,
335335

336336
init.name = name;
337337
init.ops = &sam9x5_slow_ops;
338-
init.parent_names = parent_names;
338+
init.parent_hws = parent_hws;
339339
init.num_parents = num_parents;
340340
init.flags = 0;
341341

@@ -366,18 +366,21 @@ static void __init at91sam9x5_sckc_register(struct device_node *np,
366366
unsigned int rc_osc_startup_us,
367367
const struct clk_slow_bits *bits)
368368
{
369-
const char *parent_names[2] = { "slow_rc_osc", "slow_osc" };
370369
void __iomem *regbase = of_iomap(np, 0);
371370
struct device_node *child = NULL;
372371
const char *xtal_name;
373372
struct clk_hw *slow_rc, *slow_osc, *slowck;
373+
static struct clk_parent_data parent_data = {
374+
.name = "slow_xtal",
375+
};
376+
const struct clk_hw *parent_hws[2];
374377
bool bypass;
375378
int ret;
376379

377380
if (!regbase)
378381
return;
379382

380-
slow_rc = at91_clk_register_slow_rc_osc(regbase, parent_names[0],
383+
slow_rc = at91_clk_register_slow_rc_osc(regbase, "slow_rc_osc",
381384
32768, 50000000,
382385
rc_osc_startup_us, bits);
383386
if (IS_ERR(slow_rc))
@@ -401,12 +404,16 @@ static void __init at91sam9x5_sckc_register(struct device_node *np,
401404
if (!xtal_name)
402405
goto unregister_slow_rc;
403406

404-
slow_osc = at91_clk_register_slow_osc(regbase, parent_names[1],
405-
xtal_name, 1200000, bypass, bits);
407+
parent_data.fw_name = xtal_name;
408+
409+
slow_osc = at91_clk_register_slow_osc(regbase, "slow_osc",
410+
&parent_data, 1200000, bypass, bits);
406411
if (IS_ERR(slow_osc))
407412
goto unregister_slow_rc;
408413

409-
slowck = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_names,
414+
parent_hws[0] = slow_rc;
415+
parent_hws[1] = slow_osc;
416+
slowck = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_hws,
410417
2, bits);
411418
if (IS_ERR(slowck))
412419
goto unregister_slow_osc;
@@ -464,14 +471,17 @@ static void __init of_sam9x60_sckc_setup(struct device_node *np)
464471
struct clk_hw_onecell_data *clk_data;
465472
struct clk_hw *slow_rc, *slow_osc;
466473
const char *xtal_name;
467-
const char *parent_names[2] = { "slow_rc_osc", "slow_osc" };
474+
const struct clk_hw *parent_hws[2];
475+
static struct clk_parent_data parent_data = {
476+
.name = "slow_xtal",
477+
};
468478
bool bypass;
469479
int ret;
470480

471481
if (!regbase)
472482
return;
473483

474-
slow_rc = clk_hw_register_fixed_rate_with_accuracy(NULL, parent_names[0],
484+
slow_rc = clk_hw_register_fixed_rate_with_accuracy(NULL, "slow_rc_osc",
475485
NULL, 0, 32768,
476486
93750000);
477487
if (IS_ERR(slow_rc))
@@ -481,9 +491,10 @@ static void __init of_sam9x60_sckc_setup(struct device_node *np)
481491
if (!xtal_name)
482492
goto unregister_slow_rc;
483493

494+
parent_data.fw_name = xtal_name;
484495
bypass = of_property_read_bool(np, "atmel,osc-bypass");
485-
slow_osc = at91_clk_register_slow_osc(regbase, parent_names[1],
486-
xtal_name, 5000000, bypass,
496+
slow_osc = at91_clk_register_slow_osc(regbase, "slow_osc",
497+
&parent_data, 5000000, bypass,
487498
&at91sam9x60_bits);
488499
if (IS_ERR(slow_osc))
489500
goto unregister_slow_rc;
@@ -494,14 +505,16 @@ static void __init of_sam9x60_sckc_setup(struct device_node *np)
494505

495506
/* MD_SLCK and TD_SLCK. */
496507
clk_data->num = 2;
497-
clk_data->hws[0] = clk_hw_register_fixed_rate(NULL, "md_slck",
498-
parent_names[0],
499-
0, 32768);
508+
clk_data->hws[0] = clk_hw_register_fixed_rate_parent_hw(NULL, "md_slck",
509+
slow_rc,
510+
0, 32768);
500511
if (IS_ERR(clk_data->hws[0]))
501512
goto clk_data_free;
502513

514+
parent_hws[0] = slow_rc;
515+
parent_hws[1] = slow_osc;
503516
clk_data->hws[1] = at91_clk_register_sam9x5_slow(regbase, "td_slck",
504-
parent_names, 2,
517+
parent_hws, 2,
505518
&at91sam9x60_bits);
506519
if (IS_ERR(clk_data->hws[1]))
507520
goto unregister_md_slck;
@@ -572,30 +585,36 @@ static void __init of_sama5d4_sckc_setup(struct device_node *np)
572585
void __iomem *regbase = of_iomap(np, 0);
573586
struct clk_hw *slow_rc, *slowck;
574587
struct clk_sama5d4_slow_osc *osc;
575-
struct clk_init_data init;
588+
struct clk_init_data init = {};
576589
const char *xtal_name;
577-
const char *parent_names[2] = { "slow_rc_osc", "slow_osc" };
590+
const struct clk_hw *parent_hws[2];
591+
static struct clk_parent_data parent_data = {
592+
.name = "slow_xtal",
593+
};
578594
int ret;
579595

580596
if (!regbase)
581597
return;
582598

583599
slow_rc = clk_hw_register_fixed_rate_with_accuracy(NULL,
584-
parent_names[0],
600+
"slow_rc_osc",
585601
NULL, 0, 32768,
586602
250000000);
587603
if (IS_ERR(slow_rc))
588604
return;
589605

590606
xtal_name = of_clk_get_parent_name(np, 0);
607+
if (!xtal_name)
608+
goto unregister_slow_rc;
609+
parent_data.fw_name = xtal_name;
591610

592611
osc = kzalloc(sizeof(*osc), GFP_KERNEL);
593612
if (!osc)
594613
goto unregister_slow_rc;
595614

596-
init.name = parent_names[1];
615+
init.name = "slow_osc";
597616
init.ops = &sama5d4_slow_osc_ops;
598-
init.parent_names = &xtal_name;
617+
init.parent_data = &parent_data;
599618
init.num_parents = 1;
600619
init.flags = CLK_IGNORE_UNUSED;
601620

@@ -608,8 +627,10 @@ static void __init of_sama5d4_sckc_setup(struct device_node *np)
608627
if (ret)
609628
goto free_slow_osc_data;
610629

630+
parent_hws[0] = slow_rc;
631+
parent_hws[1] = &osc->hw;
611632
slowck = at91_clk_register_sam9x5_slow(regbase, "slowck",
612-
parent_names, 2,
633+
parent_hws, 2,
613634
&at91sama5d4_bits);
614635
if (IS_ERR(slowck))
615636
goto unregister_slow_osc;

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