pinctrl: tegra: include lpdr pin properties

Update lpdr pin-property for supported pins.

lpdr property help disable most basic driver fingers
leaving only minimal base driver finger.

Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Signed-off-by: Prathamesh Shete <pshete@nvidia.com>
Link: https://lore.kernel.org/r/20211018121815.3017-1-pshete@nvidia.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Author: Suresh Mangipudi

drivers/pinctrl/tegra/pinctrl-tegra.h

@@ -118,6 +118,7 @@ struct tegra_function {
  * @slwr_width:		Slew Rising field width.
  * @slwf_bit:		Slew Falling register bit.
  * @slwf_width:		Slew Falling field width.
+ * @lpdr_bit:		Base driver enabling bit.
  * @drvtype_bit:	Drive type register bit.
  * @parked_bitmask:	Parked register mask. 0 if unsupported.
  *
@@ -161,6 +162,7 @@ struct tegra_pingroup {
 	s32 drvup_bit:6;
 	s32 slwr_bit:6;
 	s32 slwf_bit:6;
+	s32 lpdr_bit:6;
 	s32 drvtype_bit:6;
 	s32 drvdn_width:6;
 	s32 drvup_width:6;