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Merge tag 'x86-cleanups-2021-06-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 cleanups from Ingo Molnar: "Misc cleanups & removal of obsolete code" * tag 'x86-cleanups-2021-06-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/sgx: Correct kernel-doc's arg name in sgx_encl_release() doc: Remove references to IBM Calgary x86/setup: Document that Windows reserves the first MiB x86/crash: Remove crash_reserve_low_1M() x86/setup: Remove CONFIG_X86_RESERVE_LOW and reservelow= options x86/alternative: Align insn bytes vertically x86: Fix leftover comment typos x86/asm: Simplify __smp_mb() definition x86/alternatives: Make the x86nops[] symbol static
2 parents 98e62da + 1d31563 commit 8e4d7a7

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Documentation/admin-guide/kernel-parameters.txt

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Reserves a hole at the top of the kernel virtual
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address space.
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reservelow= [X86]
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Format: nn[K]
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Set the amount of memory to reserve for BIOS at
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the bottom of the address space.
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reset_devices [KNL] Force drivers to reset the underlying device
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during initialization.
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Documentation/x86/x86_64/boot-options.rst

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@@ -247,16 +247,11 @@ Multiple x86-64 PCI-DMA mapping implementations exist, for example:
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Kernel boot message: "PCI-DMA: Using software bounce buffering
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for IO (SWIOTLB)"
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4. <arch/x86_64/pci-calgary.c> : IBM Calgary hardware IOMMU. Used in IBM
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pSeries and xSeries servers. This hardware IOMMU supports DMA address
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mapping with memory protection, etc.
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Kernel boot message: "PCI-DMA: Using Calgary IOMMU"
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::
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iommu=[<size>][,noagp][,off][,force][,noforce]
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[,memaper[=<order>]][,merge][,fullflush][,nomerge]
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[,noaperture][,calgary]
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[,noaperture]
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General iommu options:
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@@ -295,8 +290,6 @@ iommu options only relevant to the AMD GART hardware IOMMU:
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Don't initialize the AGP driver and use full aperture.
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panic
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Always panic when IOMMU overflows.
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calgary
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Use the Calgary IOMMU if it is available
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iommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU
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implementation:
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force
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Force all IO through the software TLB.
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Settings for the IBM Calgary hardware IOMMU currently found in IBM
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pSeries and xSeries machines
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calgary=[64k,128k,256k,512k,1M,2M,4M,8M]
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Set the size of each PCI slot's translation table when using the
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Calgary IOMMU. This is the size of the translation table itself
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in main memory. The smallest table, 64k, covers an IO space of
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32MB; the largest, 8MB table, can cover an IO space of 4GB.
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Normally the kernel will make the right choice by itself.
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calgary=[translate_empty_slots]
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Enable translation even on slots that have no devices attached to
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them, in case a device will be hotplugged in the future.
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calgary=[disable=<PCI bus number>]
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Disable translation on a given PHB. For
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example, the built-in graphics adapter resides on the first bridge
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(PCI bus number 0); if translation (isolation) is enabled on this
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bridge, X servers that access the hardware directly from user
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space might stop working. Use this option if you have devices that
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are accessed from userspace directly on some PCI host bridge.
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panic
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Always panic when IOMMU overflows
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Miscellaneous
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=============

arch/x86/Kconfig

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@@ -1693,35 +1693,6 @@ config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK
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Set whether the default state of memory_corruption_check is
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on or off.
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config X86_RESERVE_LOW
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int "Amount of low memory, in kilobytes, to reserve for the BIOS"
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default 64
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range 4 640
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help
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Specify the amount of low memory to reserve for the BIOS.
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The first page contains BIOS data structures that the kernel
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must not use, so that page must always be reserved.
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By default we reserve the first 64K of physical RAM, as a
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number of BIOSes are known to corrupt that memory range
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during events such as suspend/resume or monitor cable
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insertion, so it must not be used by the kernel.
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You can set this to 4 if you are absolutely sure that you
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trust the BIOS to get all its memory reservations and usages
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right. If you know your BIOS have problems beyond the
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default 64K area, you can set this to 640 to avoid using the
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entire low memory range.
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If you have doubts about the BIOS (e.g. suspend/resume does
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not work or there's kernel crashes after certain hardware
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hotplug events) then you might want to enable
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X86_CHECK_BIOS_CORRUPTION=y to allow the kernel to check
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typical corruption patterns.
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Leave this to the default value of 64 if you are unsure.
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config MATH_EMULATION
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bool
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depends on MODIFY_LDT_SYSCALL

arch/x86/hyperv/hv_init.c

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@@ -623,7 +623,7 @@ bool hv_query_ext_cap(u64 cap_query)
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* output parameter to the hypercall below and so it should be
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* compatible with 'virt_to_phys'. Which means, it's address should be
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* directly mapped. Use 'static' to keep it compatible; stack variables
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* can be virtually mapped, making them imcompatible with
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* can be virtually mapped, making them incompatible with
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* 'virt_to_phys'.
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* Hypercall input/output addresses should also be 8-byte aligned.
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*/

arch/x86/include/asm/barrier.h

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@@ -54,11 +54,8 @@ static inline unsigned long array_index_mask_nospec(unsigned long index,
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#define dma_rmb() barrier()
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#define dma_wmb() barrier()
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#ifdef CONFIG_X86_32
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#define __smp_mb() asm volatile("lock; addl $0,-4(%%esp)" ::: "memory", "cc")
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#else
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#define __smp_mb() asm volatile("lock; addl $0,-4(%%rsp)" ::: "memory", "cc")
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#endif
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#define __smp_mb() asm volatile("lock; addl $0,-4(%%" _ASM_SP ")" ::: "memory", "cc")
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#define __smp_rmb() dma_rmb()
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#define __smp_wmb() barrier()
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#define __smp_store_mb(var, value) do { (void)xchg(&var, value); } while (0)

arch/x86/include/asm/crash.h

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@@ -9,10 +9,4 @@ int crash_setup_memmap_entries(struct kimage *image,
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struct boot_params *params);
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void crash_smp_send_stop(void);
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#ifdef CONFIG_KEXEC_CORE
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void __init crash_reserve_low_1M(void);
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#else
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static inline void __init crash_reserve_low_1M(void) { }
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#endif
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#endif /* _ASM_X86_CRASH_H */

arch/x86/include/asm/sgx.h

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@@ -13,7 +13,7 @@
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/*
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* This file contains both data structures defined by SGX architecture and Linux
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* defined software data structures and functions. The two should not be mixed
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* together for better readibility. The architectural definitions come first.
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* together for better readability. The architectural definitions come first.
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*/
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/* The SGX specific CPUID function. */

arch/x86/include/asm/stackprotector.h

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* The same segment is shared by percpu area and stack canary. On
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* x86_64, percpu symbols are zero based and %gs (64-bit) points to the
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* base of percpu area. The first occupant of the percpu area is always
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* fixed_percpu_data which contains stack_canary at the approproate
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* fixed_percpu_data which contains stack_canary at the appropriate
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* offset. On x86_32, the stack canary is just a regular percpu
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* variable.
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*

arch/x86/kernel/alternative.c

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@@ -75,7 +75,7 @@ do { \
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} \
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} while (0)
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const unsigned char x86nops[] =
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static const unsigned char x86nops[] =
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{
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BYTES_NOP1,
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BYTES_NOP2,
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instr, instr, a->instrlen,
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replacement, a->replacementlen);
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DUMP_BYTES(instr, a->instrlen, "%px: old_insn: ", instr);
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DUMP_BYTES(replacement, a->replacementlen, "%px: rpl_insn: ", replacement);
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DUMP_BYTES(instr, a->instrlen, "%px: old_insn: ", instr);
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DUMP_BYTES(replacement, a->replacementlen, "%px: rpl_insn: ", replacement);
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memcpy(insn_buff, replacement, a->replacementlen);
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insn_buff_sz = a->replacementlen;

arch/x86/kernel/cpu/sgx/encl.c

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@@ -383,7 +383,7 @@ const struct vm_operations_struct sgx_vm_ops = {
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/**
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* sgx_encl_release - Destroy an enclave instance
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* @kref: address of a kref inside &sgx_encl
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* @ref: address of a kref inside &sgx_encl
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*
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* Used together with kref_put(). Frees all the resources associated with the
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* enclave and the instance itself.

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