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Merge tag 'sunxi-dt-for-6.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt
- added D1 crypto node - enabled DVFS on OrangePi PC2 board - added GPIO line names on Nezha D1 board - added suniv USB nodes and enabled on licheepi-nano - new suniv boards: PopStick v1.1 and Lctech Pi - added Allwinner T113-s DTSI - added MangoPi MQ-R T113-s board variant - swapped DMA names for A23, A31, A33, D1, H3, H5, V3s * tag 'sunxi-dt-for-6.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: riscv: dts: allwinner: d1: Switch dma-names order for snps,dw-apb-uart nodes ARM: dts: sunxi: h3/h5: Switch dma-names order for snps,dw-apb-uart nodes ARM: dts: sun8i: v3s: Switch dma-names order for snps,dw-apb-uart nodes ARM: dts: sun8i: a23/a33: Switch dma-names order for snps,dw-apb-uart nodes ARM: dts: sun6i: a31: Switch dma-names order for snps,dw-apb-uart nodes ARM: dts: sunxi: add MangoPi MQ-R-T113 board dt-bindings: arm: sunxi: document MangoPi MQ-R board names ARM: dts: sunxi: add Allwinner T113-s SoC .dtsi dts: add riscv include prefix link ARM: dts: suniv: Add Lctech Pi F1C200s devicetree ARM: dts: suniv: add device tree for PopStick v1.1 dt-binding: arm: sunxi: add two board compatible strings dt-bindings: vendor-prefixes: add Source Parts and Lctech names ARM: dts: suniv: licheepi-nano: enable USB ARM: dts: suniv: add USB-related device nodes riscv: dts: nezha-d1: add gpio-line-names arm64: dts: allwinner: h5: OrangePi PC2: add OPP table to enable DVFS riscv: dts: allwinner: d1: Add crypto engine node Link: https://lore.kernel.org/r/20230408125156.GA17050@jernej-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents 58982e1 + a140b18 commit 8f09b5e

19 files changed

Lines changed: 566 additions & 25 deletions

‎Documentation/devicetree/bindings/arm/sunxi.yaml‎

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Original file line numberDiff line numberDiff line change
@@ -366,6 +366,12 @@ properties:
366366
- const: lamobo,lamobo-r1
367367
- const: allwinner,sun7i-a20
368368

369+
- description: Lctech Pi F1C200s
370+
items:
371+
- const: lctech,pi-f1c200s
372+
- const: allwinner,suniv-f1c200s
373+
- const: allwinner,suniv-f1c100s
374+
369375
- description: Libre Computer Board ALL-H3-CC H2+
370376
items:
371377
- const: libretech,all-h3-cc-h2-plus
@@ -807,6 +813,13 @@ properties:
807813
- const: sinlinx,sina33
808814
- const: allwinner,sun8i-a33
809815

816+
- description: SourceParts PopStick v1.1
817+
items:
818+
- const: sourceparts,popstick-v1.1
819+
- const: sourceparts,popstick
820+
- const: allwinner,suniv-f1c200s
821+
- const: allwinner,suniv-f1c100s
822+
810823
- description: SL631 Action Camera with IMX179
811824
items:
812825
- const: allwinner,sl631-imx179
@@ -843,6 +856,11 @@ properties:
843856
- const: wexler,tab7200
844857
- const: allwinner,sun7i-a20
845858

859+
- description: MangoPi MQ-R board
860+
items:
861+
- const: widora,mangopi-mq-r-t113
862+
- const: allwinner,sun8i-t113s
863+
846864
- description: WITS A31 Colombus Evaluation Board
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items:
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- const: wits,colombus

‎Documentation/devicetree/bindings/riscv/sunxi.yaml‎

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@@ -64,6 +64,11 @@ properties:
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- const: widora,mangopi-mq-pro
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- const: allwinner,sun20i-d1
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- description: MangoPi MQ-R board
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items:
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- const: widora,mangopi-mq-r-f133
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- const: allwinner,sun20i-d1s
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additionalProperties: true
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...

‎Documentation/devicetree/bindings/vendor-prefixes.yaml‎

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@@ -725,6 +725,8 @@ patternProperties:
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description: Lantiq Semiconductor
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"^lattice,.*":
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description: Lattice Semiconductor
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"^lctech,.*":
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description: Shenzen LC Technology Co., Ltd.
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"^leadtek,.*":
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description: Shenzhen Leadtek Technology Co., Ltd.
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"^leez,.*":
@@ -1249,6 +1251,8 @@ patternProperties:
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description: Solomon Systech Limited
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"^sony,.*":
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description: Sony Corporation
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"^sourceparts,.*":
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description: Source Parts Inc.
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"^spansion,.*":
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description: Spansion Inc.
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"^sparkfun,.*":

‎arch/arm/boot/dts/Makefile‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1411,6 +1411,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
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sun8i-s3-elimo-initium.dtb \
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sun8i-s3-lichee-zero-plus.dtb \
14131413
sun8i-s3-pinecube.dtb \
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sun8i-t113s-mangopi-mq-r-t113.dtb \
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sun8i-t3-cqa3t-bv3.dtb \
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sun8i-v3-sl631-imx179.dtb \
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sun8i-v3s-licheepi-zero.dtb \
@@ -1420,7 +1421,9 @@ dtb-$(CONFIG_MACH_SUN9I) += \
14201421
sun9i-a80-optimus.dtb \
14211422
sun9i-a80-cubieboard4.dtb
14221423
dtb-$(CONFIG_MACH_SUNIV) += \
1423-
suniv-f1c100s-licheepi-nano.dtb
1424+
suniv-f1c100s-licheepi-nano.dtb \
1425+
suniv-f1c200s-lctech-pi.dtb \
1426+
suniv-f1c200s-popstick-v1.1.dtb
14241427
dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \
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tegra20-acer-a500-picasso.dtb \
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tegra20-asus-tf101.dtb \

‎arch/arm/boot/dts/sun6i-a31.dtsi‎

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Original file line numberDiff line numberDiff line change
@@ -822,7 +822,7 @@
822822
clocks = <&ccu CLK_APB2_UART0>;
823823
resets = <&ccu RST_APB2_UART0>;
824824
dmas = <&dma 6>, <&dma 6>;
825-
dma-names = "rx", "tx";
825+
dma-names = "tx", "rx";
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status = "disabled";
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};
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@@ -835,7 +835,7 @@
835835
clocks = <&ccu CLK_APB2_UART1>;
836836
resets = <&ccu RST_APB2_UART1>;
837837
dmas = <&dma 7>, <&dma 7>;
838-
dma-names = "rx", "tx";
838+
dma-names = "tx", "rx";
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status = "disabled";
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};
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@@ -848,7 +848,7 @@
848848
clocks = <&ccu CLK_APB2_UART2>;
849849
resets = <&ccu RST_APB2_UART2>;
850850
dmas = <&dma 8>, <&dma 8>;
851-
dma-names = "rx", "tx";
851+
dma-names = "tx", "rx";
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status = "disabled";
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};
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@@ -861,7 +861,7 @@
861861
clocks = <&ccu CLK_APB2_UART3>;
862862
resets = <&ccu RST_APB2_UART3>;
863863
dmas = <&dma 9>, <&dma 9>;
864-
dma-names = "rx", "tx";
864+
dma-names = "tx", "rx";
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status = "disabled";
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};
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@@ -874,7 +874,7 @@
874874
clocks = <&ccu CLK_APB2_UART4>;
875875
resets = <&ccu RST_APB2_UART4>;
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dmas = <&dma 10>, <&dma 10>;
877-
dma-names = "rx", "tx";
877+
dma-names = "tx", "rx";
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status = "disabled";
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};
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@@ -887,7 +887,7 @@
887887
clocks = <&ccu CLK_APB2_UART5>;
888888
resets = <&ccu RST_APB2_UART5>;
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dmas = <&dma 22>, <&dma 22>;
890-
dma-names = "rx", "tx";
890+
dma-names = "tx", "rx";
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status = "disabled";
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};
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‎arch/arm/boot/dts/sun8i-a23-a33.dtsi‎

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@@ -490,7 +490,7 @@
490490
clocks = <&ccu CLK_BUS_UART0>;
491491
resets = <&ccu RST_BUS_UART0>;
492492
dmas = <&dma 6>, <&dma 6>;
493-
dma-names = "rx", "tx";
493+
dma-names = "tx", "rx";
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status = "disabled";
495495
};
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@@ -503,7 +503,7 @@
503503
clocks = <&ccu CLK_BUS_UART1>;
504504
resets = <&ccu RST_BUS_UART1>;
505505
dmas = <&dma 7>, <&dma 7>;
506-
dma-names = "rx", "tx";
506+
dma-names = "tx", "rx";
507507
status = "disabled";
508508
};
509509

@@ -516,7 +516,7 @@
516516
clocks = <&ccu CLK_BUS_UART2>;
517517
resets = <&ccu RST_BUS_UART2>;
518518
dmas = <&dma 8>, <&dma 8>;
519-
dma-names = "rx", "tx";
519+
dma-names = "tx", "rx";
520520
status = "disabled";
521521
};
522522

@@ -529,7 +529,7 @@
529529
clocks = <&ccu CLK_BUS_UART3>;
530530
resets = <&ccu RST_BUS_UART3>;
531531
dmas = <&dma 9>, <&dma 9>;
532-
dma-names = "rx", "tx";
532+
dma-names = "tx", "rx";
533533
status = "disabled";
534534
};
535535

@@ -542,7 +542,7 @@
542542
clocks = <&ccu CLK_BUS_UART4>;
543543
resets = <&ccu RST_BUS_UART4>;
544544
dmas = <&dma 10>, <&dma 10>;
545-
dma-names = "rx", "tx";
545+
dma-names = "tx", "rx";
546546
status = "disabled";
547547
};
548548

‎arch/arm/boot/dts/sun8i-t113s-mangopi-mq-r-t113.dts‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,35 @@
1+
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
2+
// Copyright (C) 2022 Arm Ltd.
3+
4+
#include <dt-bindings/interrupt-controller/irq.h>
5+
6+
/dts-v1/;
7+
8+
#include "sun8i-t113s.dtsi"
9+
#include "sunxi-d1s-t113-mangopi-mq-r.dtsi"
10+
11+
/ {
12+
model = "MangoPi MQ-R-T113";
13+
compatible = "widora,mangopi-mq-r-t113", "allwinner,sun8i-t113s";
14+
15+
aliases {
16+
ethernet0 = &rtl8189ftv;
17+
};
18+
};
19+
20+
&cpu0 {
21+
cpu-supply = <&reg_vcc_core>;
22+
};
23+
24+
&cpu1 {
25+
cpu-supply = <&reg_vcc_core>;
26+
};
27+
28+
&mmc1 {
29+
rtl8189ftv: wifi@1 {
30+
reg = <1>;
31+
interrupt-parent = <&pio>;
32+
interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 = WL_WAKE_AP */
33+
interrupt-names = "host-wake";
34+
};
35+
};

‎arch/arm/boot/dts/sun8i-t113s.dtsi‎

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,59 @@
1+
// SPDX-License-Identifier: (GPL-2.0+ or MIT)
2+
// Copyright (C) 2022 Arm Ltd.
3+
4+
#define SOC_PERIPHERAL_IRQ(nr) GIC_SPI nr
5+
6+
#include <dt-bindings/interrupt-controller/arm-gic.h>
7+
#include <riscv/allwinner/sunxi-d1s-t113.dtsi>
8+
#include <riscv/allwinner/sunxi-d1-t113.dtsi>
9+
10+
/ {
11+
interrupt-parent = <&gic>;
12+
13+
cpus {
14+
#address-cells = <1>;
15+
#size-cells = <0>;
16+
17+
cpu0: cpu@0 {
18+
compatible = "arm,cortex-a7";
19+
device_type = "cpu";
20+
reg = <0>;
21+
clocks = <&ccu CLK_CPUX>;
22+
clock-names = "cpu";
23+
};
24+
25+
cpu1: cpu@1 {
26+
compatible = "arm,cortex-a7";
27+
device_type = "cpu";
28+
reg = <1>;
29+
clocks = <&ccu CLK_CPUX>;
30+
clock-names = "cpu";
31+
};
32+
};
33+
34+
gic: interrupt-controller@1c81000 {
35+
compatible = "arm,gic-400";
36+
reg = <0x03021000 0x1000>,
37+
<0x03022000 0x2000>,
38+
<0x03024000 0x2000>,
39+
<0x03026000 0x2000>;
40+
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
41+
interrupt-controller;
42+
#interrupt-cells = <3>;
43+
};
44+
45+
timer {
46+
compatible = "arm,armv7-timer";
47+
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
48+
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
49+
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
50+
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
51+
};
52+
53+
pmu {
54+
compatible = "arm,cortex-a7-pmu";
55+
interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>,
56+
<GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
57+
interrupt-affinity = <&cpu0>, <&cpu1>;
58+
};
59+
};

‎arch/arm/boot/dts/sun8i-v3s.dtsi‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -479,7 +479,7 @@
479479
reg-io-width = <4>;
480480
clocks = <&ccu CLK_BUS_UART0>;
481481
dmas = <&dma 6>, <&dma 6>;
482-
dma-names = "rx", "tx";
482+
dma-names = "tx", "rx";
483483
resets = <&ccu RST_BUS_UART0>;
484484
status = "disabled";
485485
};
@@ -492,7 +492,7 @@
492492
reg-io-width = <4>;
493493
clocks = <&ccu CLK_BUS_UART1>;
494494
dmas = <&dma 7>, <&dma 7>;
495-
dma-names = "rx", "tx";
495+
dma-names = "tx", "rx";
496496
resets = <&ccu RST_BUS_UART1>;
497497
status = "disabled";
498498
};
@@ -505,7 +505,7 @@
505505
reg-io-width = <4>;
506506
clocks = <&ccu CLK_BUS_UART2>;
507507
dmas = <&dma 8>, <&dma 8>;
508-
dma-names = "rx", "tx";
508+
dma-names = "tx", "rx";
509509
resets = <&ccu RST_BUS_UART2>;
510510
pinctrl-0 = <&uart2_pins>;
511511
pinctrl-names = "default";

‎arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,8 @@
66
/dts-v1/;
77
#include "suniv-f1c100s.dtsi"
88

9+
#include <dt-bindings/gpio/gpio.h>
10+
911
/ {
1012
model = "Lichee Pi Nano";
1113
compatible = "licheepi,licheepi-nano", "allwinner,suniv-f1c100s";
@@ -50,8 +52,22 @@
5052
};
5153
};
5254

55+
&otg_sram {
56+
status = "okay";
57+
};
58+
5359
&uart0 {
5460
pinctrl-names = "default";
5561
pinctrl-0 = <&uart0_pe_pins>;
5662
status = "okay";
5763
};
64+
65+
&usb_otg {
66+
dr_mode = "otg";
67+
status = "okay";
68+
};
69+
70+
&usbphy {
71+
usb0_id_det-gpios = <&pio 4 2 GPIO_ACTIVE_HIGH>; /* PE2 */
72+
status = "okay";
73+
};

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