Skip to content

Commit 8f31c7b

Browse files
Reza Aminialexdeucher
authored andcommitted
drm/amd/display: Correct unit conversion for vstartup
[why] vstartup is calculated to be a large number. it works because it is within vertical blank, but it reduces region of blank that can be used for power gating. [how] Calculation needs to convert micro seconds to number of vertical lines. Reviewed-by: Kazlauskas Nicholas <Nicholas.Kazlauskas@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Reza Amini <reza.amini@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
1 parent bab9bec commit 8f31c7b

1 file changed

Lines changed: 24 additions & 1 deletion

File tree

drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c

Lines changed: 24 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,7 @@
3131
#include "dml/dcn20/dcn20_fpu.h"
3232
#include "dml/dcn31/dcn31_fpu.h"
3333
#include "dml/display_mode_vba.h"
34+
#include "dml/dml_inline_defs.h"
3435

3536
struct _vcs_dpi_ip_params_st dcn3_14_ip = {
3637
.VBlankNomDefaultUS = 668,
@@ -273,6 +274,25 @@ static bool is_dual_plane(enum surface_pixel_format format)
273274
return format >= SURFACE_PIXEL_FORMAT_VIDEO_BEGIN || format == SURFACE_PIXEL_FORMAT_GRPH_RGBE_ALPHA;
274275
}
275276

277+
/*
278+
* micro_sec_to_vert_lines () - converts time to number of vertical lines for a given timing
279+
*
280+
* @param: num_us: number of microseconds
281+
* @return: number of vertical lines. If exact number of vertical lines is not found then
282+
* it will round up to next number of lines to guarantee num_us
283+
*/
284+
static unsigned int micro_sec_to_vert_lines(unsigned int num_us, struct dc_crtc_timing *timing)
285+
{
286+
unsigned int num_lines = 0;
287+
unsigned int lines_time_in_ns = 1000.0 *
288+
(((float)timing->h_total * 1000.0) /
289+
((float)timing->pix_clk_100hz / 10.0));
290+
291+
num_lines = dml_ceil(1000.0 * num_us / lines_time_in_ns, 1.0);
292+
293+
return num_lines;
294+
}
295+
276296
int dcn314_populate_dml_pipes_from_context_fpu(struct dc *dc, struct dc_state *context,
277297
display_e2e_pipe_params_st *pipes,
278298
bool fast_validate)
@@ -289,19 +309,22 @@ int dcn314_populate_dml_pipes_from_context_fpu(struct dc *dc, struct dc_state *c
289309

290310
for (i = 0, pipe_cnt = 0; i < dc->res_pool->pipe_count; i++) {
291311
struct dc_crtc_timing *timing;
312+
unsigned int num_lines = 0;
292313

293314
if (!res_ctx->pipe_ctx[i].stream)
294315
continue;
295316
pipe = &res_ctx->pipe_ctx[i];
296317
timing = &pipe->stream->timing;
297318

319+
num_lines = micro_sec_to_vert_lines(dcn3_14_ip.VBlankNomDefaultUS, timing);
320+
298321
if (pipe->stream->adjust.v_total_min != 0)
299322
pipes[pipe_cnt].pipe.dest.vtotal = pipe->stream->adjust.v_total_min;
300323
else
301324
pipes[pipe_cnt].pipe.dest.vtotal = timing->v_total;
302325

303326
pipes[pipe_cnt].pipe.dest.vblank_nom = timing->v_total - pipes[pipe_cnt].pipe.dest.vactive;
304-
pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, dcn3_14_ip.VBlankNomDefaultUS);
327+
pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, num_lines);
305328
pipes[pipe_cnt].pipe.dest.vblank_nom = max(pipes[pipe_cnt].pipe.dest.vblank_nom, timing->v_sync_width);
306329
pipes[pipe_cnt].pipe.dest.vblank_nom = min(pipes[pipe_cnt].pipe.dest.vblank_nom, max_allowed_vblank_nom);
307330

0 commit comments

Comments
 (0)