Skip to content

Commit 907bb57

Browse files
torvaldstorvalds
committed
Merge tag 'pinctrl-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij: "Pretty big this time. Mostly due to (nice) Renesas refactorings. Core changes: - New helpers from Andy such as for_each_gpiochip_node() affecting both GPIO and pin control, improving a bunch of drivers in the process. - Pulled in Marc Zyngiers work to make IRQ chips immutable, and started to apply fixups on top. New drivers: - New driver for Marvell MVEBU 98DX2530. - New driver for Mediatek MT8195. - Support Qualcomm PMX65 and PM6125. - New driver for Qualcomm SC7280 LPASS pin control. - New driver for Rockchip RK3588. - New driver for NXP Freescale i.MXRT1170. - New driver for Mediatek MT6795 Helio X10. Improvements: - Several Aspeed G6 cleanups and non-critical fixes. - Thorought refactoring of some of the ever improving Renesas drivers. - Clean up Mediatek MT8192 bindings a bit. - PWM output and clock monitoring in the Ocelot LAN966x driver. - Thorough refactoring and cleanup of the Ralink drivers such as RT2880, RT3883, RT305X, MT7620, MT7621, MT7628 splitting these into proper sub-drivers" * tag 'pinctrl-v5.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (161 commits) pinctrl: apple: Use a raw spinlock for the regmap pinctrl: berlin: bg4ct: Use devm_platform_*ioremap_resource() APIs pinctrl: intel: Fix kernel doc format, i.e. add return sections dt-bindings: pinctrl: qcom: Drop 'maxItems' on 'wakeup-parent' pinctrl: starfive: Make the irqchip immutable pinctrl: mediatek: Add pinctrl driver for MT6795 Helio X10 dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings pinctrl: freescale: Add i.MXRT1170 pinctrl driver support dt-bindings: pinctrl: add i.MXRT1170 pinctrl Documentation dt-bindings: pinctrl: rockchip: increase max amount of device functions dt-bindings: pinctrl: qcom,pmic-gpio: add 'gpio-reserved-ranges' dt-bindings: pinctrl: qcom,pmic-gpio: add 'input-disable' dt-bindings: pinctrl: qcom,pmic-gpio: describe gpio-line-names dt-bindings: pinctrl: qcom,pmic-gpio: fix matching pin config dt-bindings: pinctrl: qcom,pmic-gpio: document PM8150L and PMM8155AU pinctrl: qcom: spmi-gpio: Add pm6125 compatible dt-bindings: pinctrl: qcom-pmic-gpio: Add pm6125 compatible pinctrl: intel: Drop unused irqchip member in struct intel_pinctrl pinctrl: intel: make irq_chip immutable pinctrl: cherryview: Use GPIO chip pointer in chv_gpio_irq_mask_unmask() ...
2 parents ca7984d + 8396980 commit 907bb57

129 files changed

Lines changed: 9115 additions & 4211 deletions

File tree

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

‎Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.txt‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@ Properties:
2222
- "qcom,sc7280-pdc": For SC7280
2323
- "qcom,sdm845-pdc": For SDM845
2424
- "qcom,sm6350-pdc": For SM6350
25+
- "qcom,sm8150-pdc": For SM8150
2526
- "qcom,sm8250-pdc": For SM8250
2627
- "qcom,sm8350-pdc": For SM8350
2728

‎Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml‎

Lines changed: 16 additions & 65 deletions
Original file line numberDiff line numberDiff line change
@@ -76,73 +76,24 @@ additionalProperties: false
7676
examples:
7777
- |
7878
#include <dt-bindings/clock/aspeed-clock.h>
79-
apb {
80-
compatible = "simple-bus";
81-
#address-cells = <1>;
82-
#size-cells = <1>;
83-
ranges;
84-
85-
syscon: scu@1e6e2000 {
86-
compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
87-
reg = <0x1e6e2000 0x1a8>;
88-
#clock-cells = <1>;
89-
#reset-cells = <1>;
90-
91-
pinctrl: pinctrl {
92-
compatible = "aspeed,ast2500-pinctrl";
93-
aspeed,external-nodes = <&gfx>, <&lhc>;
94-
95-
pinctrl_i2c3_default: i2c3_default {
96-
function = "I2C3";
97-
groups = "I2C3";
98-
};
99-
100-
pinctrl_gpioh0_unbiased_default: gpioh0 {
101-
pins = "A18";
102-
bias-disable;
103-
};
79+
scu@1e6e2000 {
80+
compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
81+
reg = <0x1e6e2000 0x1a8>;
82+
#clock-cells = <1>;
83+
#reset-cells = <1>;
84+
85+
pinctrl: pinctrl {
86+
compatible = "aspeed,ast2500-pinctrl";
87+
aspeed,external-nodes = <&gfx>, <&lhc>;
88+
89+
pinctrl_i2c3_default: i2c3_default {
90+
function = "I2C3";
91+
groups = "I2C3";
10492
};
105-
};
106-
107-
gfx: display@1e6e6000 {
108-
compatible = "aspeed,ast2500-gfx", "syscon";
109-
reg = <0x1e6e6000 0x1000>;
110-
reg-io-width = <4>;
111-
clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
112-
resets = <&syscon ASPEED_RESET_CRT1>;
113-
interrupts = <0x19>;
114-
syscon = <&syscon>;
115-
memory-region = <&gfx_memory>;
116-
};
117-
};
118-
119-
lpc: lpc@1e789000 {
120-
compatible = "aspeed,ast2500-lpc", "simple-mfd";
121-
reg = <0x1e789000 0x1000>;
122-
123-
#address-cells = <1>;
124-
#size-cells = <1>;
125-
ranges = <0x0 0x1e789000 0x1000>;
126-
127-
lpc_host: lpc-host@80 {
128-
compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
129-
reg = <0x80 0x1e0>;
130-
reg-io-width = <4>;
13193
132-
#address-cells = <1>;
133-
#size-cells = <1>;
134-
ranges = <0x0 0x80 0x1e0>;
135-
136-
lhc: lhc@20 {
137-
compatible = "aspeed,ast2500-lhc";
138-
reg = <0x20 0x24>, <0x48 0x8>;
94+
pinctrl_gpioh0_unbiased_default: gpioh0 {
95+
pins = "A18";
96+
bias-disable;
13997
};
14098
};
14199
};
142-
143-
gfx_memory: framebuffer {
144-
size = <0x01000000>;
145-
alignment = <0x01000000>;
146-
compatible = "shared-dma-pool";
147-
reusable;
148-
};

‎Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.txt‎

Lines changed: 0 additions & 87 deletions
This file was deleted.

‎Documentation/devicetree/bindings/pinctrl/fsl,imx7d-pinctrl.yaml‎

Lines changed: 113 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,113 @@
1+
# SPDX-License-Identifier: GPL-2.0
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/pinctrl/fsl,imx7d-pinctrl.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: Freescale IMX7D IOMUX Controller
8+
9+
maintainers:
10+
- Dong Aisheng <aisheng.dong@nxp.com>
11+
12+
description:
13+
Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
14+
for common binding part and usage.
15+
16+
properties:
17+
compatible:
18+
oneOf:
19+
- enum:
20+
- fsl,imx7d-iomuxc
21+
- fsl,imx7d-iomuxc-lpsr
22+
23+
reg:
24+
maxItems: 1
25+
26+
fsl,input-sel:
27+
description:
28+
phandle for main iomuxc controller which shares the input select
29+
register for daisy chain settings.
30+
$ref: /schemas/types.yaml#/definitions/phandle
31+
32+
# Client device subnode's properties
33+
patternProperties:
34+
'grp$':
35+
type: object
36+
description:
37+
Pinctrl node's client devices use subnodes for desired pin configuration.
38+
Client device subnodes use below standard properties.
39+
40+
properties:
41+
fsl,pins:
42+
description:
43+
each entry consists of 6 integers and represents the mux and config
44+
setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
45+
mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
46+
be found in <arch/arm/boot/dts/imx7d-pinfunc.h>. The last integer
47+
CONFIG is the pad setting value like pull-up on this pin. Please
48+
refer to i.MX7D Reference Manual for detailed CONFIG settings.
49+
$ref: /schemas/types.yaml#/definitions/uint32-matrix
50+
items:
51+
items:
52+
- description: |
53+
"mux_reg" indicates the offset of mux register.
54+
- description: |
55+
"conf_reg" indicates the offset of pad configuration register.
56+
- description: |
57+
"input_reg" indicates the offset of select input register.
58+
- description: |
59+
"mux_val" indicates the mux value to be applied.
60+
- description: |
61+
"input_val" indicates the select input value to be applied.
62+
- description: |
63+
"pad_setting" indicates the pad configuration value to be applied.
64+
65+
required:
66+
- fsl,pins
67+
68+
additionalProperties: false
69+
70+
allOf:
71+
- $ref: "pinctrl.yaml#"
72+
73+
required:
74+
- compatible
75+
- reg
76+
77+
if:
78+
properties:
79+
compatible:
80+
contains:
81+
enum:
82+
- fsl,imx7d-iomuxc-lpsr
83+
84+
then:
85+
required:
86+
- fsl,input-sel
87+
88+
additionalProperties: false
89+
90+
examples:
91+
- |
92+
iomuxc: pinctrl@30330000 {
93+
compatible = "fsl,imx7d-iomuxc";
94+
reg = <0x30330000 0x10000>;
95+
96+
pinctrl_uart5: uart5grp {
97+
fsl,pins =
98+
<0x0160 0x03D0 0x0714 0x1 0x0 0x7e>,
99+
<0x0164 0x03D4 0x0000 0x1 0x0 0x76>;
100+
};
101+
};
102+
- |
103+
iomuxc_lpsr: pinctrl@302c0000 {
104+
compatible = "fsl,imx7d-iomuxc-lpsr";
105+
reg = <0x302c0000 0x10000>;
106+
fsl,input-sel = <&iomuxc>;
107+
108+
pinctrl_gpio_lpsr: gpio1-grp {
109+
fsl,pins =
110+
<0x0008 0x0038 0x0000 0x0 0x0 0x59>,
111+
<0x000C 0x003C 0x0000 0x0 0x0 0x59>;
112+
};
113+
};

‎Documentation/devicetree/bindings/pinctrl/fsl,imxrt1170.yaml‎

Lines changed: 77 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,77 @@
1+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/pinctrl/fsl,imxrt1170.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: Freescale i.MXRT1170 IOMUX Controller
8+
9+
maintainers:
10+
- Giulio Benetti <giulio.benetti@benettiengineering.com>
11+
- Jesse Taube <Mr.Bossman075@gmail.com>
12+
13+
description:
14+
Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
15+
for common binding part and usage.
16+
17+
properties:
18+
compatible:
19+
const: fsl,imxrt1170-iomuxc
20+
21+
reg:
22+
maxItems: 1
23+
24+
# Client device subnode's properties
25+
patternProperties:
26+
'grp$':
27+
type: object
28+
description:
29+
Pinctrl node's client devices use subnodes for desired pin configuration.
30+
Client device subnodes use below standard properties.
31+
32+
properties:
33+
fsl,pins:
34+
description:
35+
each entry consists of 6 integers and represents the mux and config
36+
setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
37+
mux_val input_val> are specified using a PIN_FUNC_ID macro, which can
38+
be found in <arch/arm/boot/dts/imxrt1170-pinfunc.h>. The last
39+
integer CONFIG is the pad setting value like pull-up on this pin. Please
40+
refer to i.MXRT1170 Reference Manual for detailed CONFIG settings.
41+
$ref: /schemas/types.yaml#/definitions/uint32-matrix
42+
items:
43+
items:
44+
- description: |
45+
"mux_reg" indicates the offset of mux register.
46+
- description: |
47+
"conf_reg" indicates the offset of pad configuration register.
48+
- description: |
49+
"input_reg" indicates the offset of select input register.
50+
- description: |
51+
"mux_val" indicates the mux value to be applied.
52+
- description: |
53+
"input_val" indicates the select input value to be applied.
54+
- description: |
55+
"pad_setting" indicates the pad configuration value to be applied.
56+
required:
57+
- fsl,pins
58+
59+
additionalProperties: false
60+
61+
required:
62+
- compatible
63+
- reg
64+
65+
additionalProperties: false
66+
67+
examples:
68+
- |
69+
iomuxc: iomuxc@400e8000 {
70+
compatible = "fsl,imxrt1170-iomuxc";
71+
reg = <0x400e8000 0x4000>;
72+
pinctrl_lpuart1: lpuart1grp {
73+
fsl,pins =
74+
<0x16C 0x3B0 0x620 0x0 0x0 0xf1>,
75+
<0x170 0x3B4 0x61C 0x0 0x0 0xf1>;
76+
};
77+
};

0 commit comments

Comments
 (0)