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Nicolas FrattaroliYuryNorov
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soc: rockchip: grf: switch to FIELD_PREP_WM16_CONST macro
The era of hand-rolled HIWORD_UPDATE macros is over, at least for those drivers that use constant masks. Switch the rockchip grf driver to the FIELD_PREP_WM16_CONST macro, which brings with it more error checking while still being able to be used in initializers. All HIWORD_UPDATE instances and its definition are removed from the driver, as the conversion here is obvious, and static_asserts were used during development to make sure the ones greater than one bit in width were really equivalent. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
1 parent 47975a8 commit 90fbf6a

1 file changed

Lines changed: 17 additions & 18 deletions

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  • drivers/soc/rockchip

drivers/soc/rockchip/grf.c

Lines changed: 17 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -6,13 +6,12 @@
66
*/
77

88
#include <linux/err.h>
9+
#include <linux/hw_bitfield.h>
910
#include <linux/mfd/syscon.h>
1011
#include <linux/of.h>
1112
#include <linux/platform_device.h>
1213
#include <linux/regmap.h>
1314

14-
#define HIWORD_UPDATE(val, mask, shift) \
15-
((val) << (shift) | (mask) << ((shift) + 16))
1615

1716
struct rockchip_grf_value {
1817
const char *desc;
@@ -32,7 +31,7 @@ static const struct rockchip_grf_value rk3036_defaults[] __initconst = {
3231
* Disable auto jtag/sdmmc switching that causes issues with the
3332
* clock-framework and the mmc controllers making them unreliable.
3433
*/
35-
{ "jtag switching", RK3036_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 11) },
34+
{ "jtag switching", RK3036_GRF_SOC_CON0, FIELD_PREP_WM16_CONST(BIT(11), 0) },
3635
};
3736

3837
static const struct rockchip_grf_info rk3036_grf __initconst = {
@@ -44,8 +43,8 @@ static const struct rockchip_grf_info rk3036_grf __initconst = {
4443
#define RK3128_GRF_SOC_CON1 0x144
4544

4645
static const struct rockchip_grf_value rk3128_defaults[] __initconst = {
47-
{ "jtag switching", RK3128_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 8) },
48-
{ "vpu main clock", RK3128_GRF_SOC_CON1, HIWORD_UPDATE(0, 1, 10) },
46+
{ "jtag switching", RK3128_GRF_SOC_CON0, FIELD_PREP_WM16_CONST(BIT(8), 0) },
47+
{ "vpu main clock", RK3128_GRF_SOC_CON1, FIELD_PREP_WM16_CONST(BIT(10), 0) },
4948
};
5049

5150
static const struct rockchip_grf_info rk3128_grf __initconst = {
@@ -56,7 +55,7 @@ static const struct rockchip_grf_info rk3128_grf __initconst = {
5655
#define RK3228_GRF_SOC_CON6 0x418
5756

5857
static const struct rockchip_grf_value rk3228_defaults[] __initconst = {
59-
{ "jtag switching", RK3228_GRF_SOC_CON6, HIWORD_UPDATE(0, 1, 8) },
58+
{ "jtag switching", RK3228_GRF_SOC_CON6, FIELD_PREP_WM16_CONST(BIT(8), 0) },
6059
};
6160

6261
static const struct rockchip_grf_info rk3228_grf __initconst = {
@@ -68,8 +67,8 @@ static const struct rockchip_grf_info rk3228_grf __initconst = {
6867
#define RK3288_GRF_SOC_CON2 0x24c
6968

7069
static const struct rockchip_grf_value rk3288_defaults[] __initconst = {
71-
{ "jtag switching", RK3288_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 12) },
72-
{ "pwm select", RK3288_GRF_SOC_CON2, HIWORD_UPDATE(1, 1, 0) },
70+
{ "jtag switching", RK3288_GRF_SOC_CON0, FIELD_PREP_WM16_CONST(BIT(12), 0) },
71+
{ "pwm select", RK3288_GRF_SOC_CON2, FIELD_PREP_WM16_CONST(BIT(0), 1) },
7372
};
7473

7574
static const struct rockchip_grf_info rk3288_grf __initconst = {
@@ -80,7 +79,7 @@ static const struct rockchip_grf_info rk3288_grf __initconst = {
8079
#define RK3328_GRF_SOC_CON4 0x410
8180

8281
static const struct rockchip_grf_value rk3328_defaults[] __initconst = {
83-
{ "jtag switching", RK3328_GRF_SOC_CON4, HIWORD_UPDATE(0, 1, 12) },
82+
{ "jtag switching", RK3328_GRF_SOC_CON4, FIELD_PREP_WM16_CONST(BIT(12), 0) },
8483
};
8584

8685
static const struct rockchip_grf_info rk3328_grf __initconst = {
@@ -91,7 +90,7 @@ static const struct rockchip_grf_info rk3328_grf __initconst = {
9190
#define RK3368_GRF_SOC_CON15 0x43c
9291

9392
static const struct rockchip_grf_value rk3368_defaults[] __initconst = {
94-
{ "jtag switching", RK3368_GRF_SOC_CON15, HIWORD_UPDATE(0, 1, 13) },
93+
{ "jtag switching", RK3368_GRF_SOC_CON15, FIELD_PREP_WM16_CONST(BIT(13), 0) },
9594
};
9695

9796
static const struct rockchip_grf_info rk3368_grf __initconst = {
@@ -102,7 +101,7 @@ static const struct rockchip_grf_info rk3368_grf __initconst = {
102101
#define RK3399_GRF_SOC_CON7 0xe21c
103102

104103
static const struct rockchip_grf_value rk3399_defaults[] __initconst = {
105-
{ "jtag switching", RK3399_GRF_SOC_CON7, HIWORD_UPDATE(0, 1, 12) },
104+
{ "jtag switching", RK3399_GRF_SOC_CON7, FIELD_PREP_WM16_CONST(BIT(12), 0) },
106105
};
107106

108107
static const struct rockchip_grf_info rk3399_grf __initconst = {
@@ -113,9 +112,9 @@ static const struct rockchip_grf_info rk3399_grf __initconst = {
113112
#define RK3566_GRF_USB3OTG0_CON1 0x0104
114113

115114
static const struct rockchip_grf_value rk3566_defaults[] __initconst = {
116-
{ "usb3otg port switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(0, 1, 12) },
117-
{ "usb3otg clock switch", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 7) },
118-
{ "usb3otg disable usb3", RK3566_GRF_USB3OTG0_CON1, HIWORD_UPDATE(1, 1, 0) },
115+
{ "usb3otg port switch", RK3566_GRF_USB3OTG0_CON1, FIELD_PREP_WM16_CONST(BIT(12), 0) },
116+
{ "usb3otg clock switch", RK3566_GRF_USB3OTG0_CON1, FIELD_PREP_WM16_CONST(BIT(7), 1) },
117+
{ "usb3otg disable usb3", RK3566_GRF_USB3OTG0_CON1, FIELD_PREP_WM16_CONST(BIT(0), 1) },
119118
};
120119

121120
static const struct rockchip_grf_info rk3566_pipegrf __initconst = {
@@ -126,8 +125,8 @@ static const struct rockchip_grf_info rk3566_pipegrf __initconst = {
126125
#define RK3576_SYSGRF_SOC_CON1 0x0004
127126

128127
static const struct rockchip_grf_value rk3576_defaults_sys_grf[] __initconst = {
129-
{ "i3c0 weakpull", RK3576_SYSGRF_SOC_CON1, HIWORD_UPDATE(3, 3, 6) },
130-
{ "i3c1 weakpull", RK3576_SYSGRF_SOC_CON1, HIWORD_UPDATE(3, 3, 8) },
128+
{ "i3c0 weakpull", RK3576_SYSGRF_SOC_CON1, FIELD_PREP_WM16_CONST(GENMASK(7, 6), 3) },
129+
{ "i3c1 weakpull", RK3576_SYSGRF_SOC_CON1, FIELD_PREP_WM16_CONST(GENMASK(9, 8), 3) },
131130
};
132131

133132
static const struct rockchip_grf_info rk3576_sysgrf __initconst = {
@@ -138,7 +137,7 @@ static const struct rockchip_grf_info rk3576_sysgrf __initconst = {
138137
#define RK3576_IOCGRF_MISC_CON 0x04F0
139138

140139
static const struct rockchip_grf_value rk3576_defaults_ioc_grf[] __initconst = {
141-
{ "jtag switching", RK3576_IOCGRF_MISC_CON, HIWORD_UPDATE(0, 1, 1) },
140+
{ "jtag switching", RK3576_IOCGRF_MISC_CON, FIELD_PREP_WM16_CONST(BIT(1), 0) },
142141
};
143142

144143
static const struct rockchip_grf_info rk3576_iocgrf __initconst = {
@@ -149,7 +148,7 @@ static const struct rockchip_grf_info rk3576_iocgrf __initconst = {
149148
#define RK3588_GRF_SOC_CON6 0x0318
150149

151150
static const struct rockchip_grf_value rk3588_defaults[] __initconst = {
152-
{ "jtag switching", RK3588_GRF_SOC_CON6, HIWORD_UPDATE(0, 1, 14) },
151+
{ "jtag switching", RK3588_GRF_SOC_CON6, FIELD_PREP_WM16_CONST(BIT(14), 0) },
153152
};
154153

155154
static const struct rockchip_grf_info rk3588_sysgrf __initconst = {

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