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Merge tag 'zynqmp-dt-for-6.20' of https://github.com/Xilinx/linux-xlnx into soc/dt
arm64: Xilinx DT changes for 6.20 - Cleanup SPI compatible strings - wwdt: Add optional power-domains property - ZynqMP: Fix OPP description and setup - ZynqMP: Remove OP-TEE node - Drop label from dlg,slg7xl45106 - Remove ina260 IIO description * tag 'zynqmp-dt-for-6.20' of https://github.com/Xilinx/linux-xlnx: arm64: zynqmp: Remove ina260 IIO description arm64: dts: xilinx: Drop "label" property on dlg,slg7xl45106 Revert "arm64: zynqmp: Add an OP-TEE node to the device tree" arm64: dts: xilinx: fix zynqmp opp-table-cpu dt-bindings: watchdog: xlnx,versal-wwdt: Add optional power-domains property arm64: dts: xilinx: add soc-specific spi compatibles for zynqmp/versal-net Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2 parents 3d46ce7 + 4310a37 commit 915ed61

9 files changed

Lines changed: 16 additions & 51 deletions

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‎Documentation/devicetree/bindings/watchdog/xlnx,versal-wwdt.yaml‎

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Original file line numberDiff line numberDiff line change
@@ -32,6 +32,9 @@ properties:
3232
clocks:
3333
maxItems: 1
3434

35+
power-domains:
36+
maxItems: 1
37+
3538
required:
3639
- compatible
3740
- reg

‎arch/arm64/boot/dts/xilinx/versal-net.dtsi‎

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Original file line numberDiff line numberDiff line change
@@ -1018,15 +1018,15 @@
10181018
};
10191019

10201020
spi0: spi@f1960000 {
1021-
compatible = "cdns,spi-r1p6";
1021+
compatible = "xlnx,versal-net-spi-r1p6", "cdns,spi-r1p6";
10221022
status = "disabled";
10231023
interrupts = <0 23 4>;
10241024
reg = <0 0xf1960000 0 0x1000>;
10251025
clock-names = "ref_clk", "pclk";
10261026
};
10271027

10281028
spi1: spi@f1970000 {
1029-
compatible = "cdns,spi-r1p6";
1029+
compatible = "xlnx,versal-net-spi-r1p6", "cdns,spi-r1p6";
10301030
status = "disabled";
10311031
interrupts = <0 24 4>;
10321032
reg = <0 0xf1970000 0 0x1000>;

‎arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@
1414
bootph-all;
1515
compatible = "fixed-clock";
1616
#clock-cells = <0>;
17-
clock-frequency = <33333333>;
17+
clock-frequency = <33333000>;
1818
clock-output-names = "pss_ref_clk";
1919
};
2020

‎arch/arm64/boot/dts/xilinx/zynqmp-sck-kd-g-revA.dtso‎

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Original file line numberDiff line numberDiff line change
@@ -26,11 +26,6 @@
2626
ethernet0 = "/axi/ethernet@ff0c0000"; /* &gem1 */
2727
};
2828

29-
ina260-u3 {
30-
compatible = "iio-hwmon";
31-
io-channels = <&u3 0>, <&u3 1>, <&u3 2>;
32-
};
33-
3429
clk_26: clock2 { /* u17 - USB */
3530
compatible = "fixed-clock";
3631
#clock-cells = <0>;
@@ -67,15 +62,13 @@
6762

6863
u3: ina260@40 { /* u3 */
6964
compatible = "ti,ina260";
70-
#io-channel-cells = <1>;
7165
label = "ina260-u14";
7266
reg = <0x40>;
7367
};
7468

7569
slg7xl45106: gpio@11 { /* u13 - reset logic */
7670
compatible = "dlg,slg7xl45106";
7771
reg = <0x11>;
78-
label = "resetchip";
7972
gpio-controller;
8073
#gpio-cells = <2>;
8174
gpio-line-names = "USB0_PHY_RESET_B", "",

‎arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revA.dtso‎

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -25,11 +25,6 @@
2525
ethernet1 = "/axi/ethernet@ff0c0000"; /* &gem1 */
2626
};
2727

28-
ina260-u14 {
29-
compatible = "iio-hwmon";
30-
io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
31-
};
32-
3328
clk_27: clock0 { /* u86 - DP */
3429
compatible = "fixed-clock";
3530
#clock-cells = <0>;
@@ -95,15 +90,13 @@
9590

9691
u14: ina260@40 { /* u14 */
9792
compatible = "ti,ina260";
98-
#io-channel-cells = <1>;
9993
label = "ina260-u14";
10094
reg = <0x40>;
10195
};
10296

10397
slg7xl45106: gpio@11 { /* u19 - reset logic */
10498
compatible = "dlg,slg7xl45106";
10599
reg = <0x11>;
106-
label = "resetchip";
107100
gpio-controller;
108101
#gpio-cells = <2>;
109102
gpio-line-names = "USB0_PHY_RESET_B", "USB1_PHY_RESET_B",

‎arch/arm64/boot/dts/xilinx/zynqmp-sck-kr-g-revB.dtso‎

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Original file line numberDiff line numberDiff line change
@@ -25,11 +25,6 @@
2525
ethernet1 = "/axi/ethernet@ff0c0000"; /* &gem1 */
2626
};
2727

28-
ina260-u14 {
29-
compatible = "iio-hwmon";
30-
io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
31-
};
32-
3328
clk_125: clock0 { /* u87 - GEM0/1 */
3429
compatible = "fixed-clock";
3530
#clock-cells = <0>;
@@ -96,15 +91,13 @@
9691

9792
u14: ina260@40 { /* u14 */
9893
compatible = "ti,ina260";
99-
#io-channel-cells = <1>;
10094
label = "ina260-u14";
10195
reg = <0x40>;
10296
};
10397

10498
slg7xl45106: gpio@11 { /* u19 - reset logic */
10599
compatible = "dlg,slg7xl45106";
106100
reg = <0x11>;
107-
label = "resetchip";
108101
gpio-controller;
109102
#gpio-cells = <2>;
110103
gpio-line-names = "USB0_PHY_RESET_B", "USB1_PHY_RESET_B",

‎arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revA.dtso‎

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Original file line numberDiff line numberDiff line change
@@ -32,11 +32,6 @@
3232
ethernet0 = "/axi/ethernet@ff0e0000"; /* &gem3 */
3333
};
3434

35-
ina260-u14 {
36-
compatible = "iio-hwmon";
37-
io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
38-
};
39-
4035
si5332_0: si5332-0 { /* u17 */
4136
compatible = "fixed-clock";
4237
#clock-cells = <0>;
@@ -96,7 +91,6 @@
9691

9792
u14: ina260@40 { /* u14 */
9893
compatible = "ti,ina260";
99-
#io-channel-cells = <1>;
10094
label = "ina260-u14";
10195
reg = <0x40>;
10296
};

‎arch/arm64/boot/dts/xilinx/zynqmp-sck-kv-g-revB.dtso‎

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Original file line numberDiff line numberDiff line change
@@ -27,11 +27,6 @@
2727
ethernet0 = "/axi/ethernet@ff0e0000"; /* &gem3 */
2828
};
2929

30-
ina260-u14 {
31-
compatible = "iio-hwmon";
32-
io-channels = <&u14 0>, <&u14 1>, <&u14 2>;
33-
};
34-
3530
si5332_0: si5332-0 { /* u17 */
3631
compatible = "fixed-clock";
3732
#clock-cells = <0>;
@@ -92,7 +87,6 @@
9287

9388
u14: ina260@40 { /* u14 */
9489
compatible = "ti,ina260";
95-
#io-channel-cells = <1>;
9690
label = "ina260-u14";
9791
reg = <0x40>;
9892
};

‎arch/arm64/boot/dts/xilinx/zynqmp.dtsi‎

Lines changed: 10 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -103,23 +103,23 @@
103103
cpu_opp_table: opp-table-cpu {
104104
compatible = "operating-points-v2";
105105
opp-shared;
106-
opp00 {
107-
opp-hz = /bits/ 64 <1199999988>;
106+
opp-1200000000 {
107+
opp-hz = /bits/ 64 <1200000000>;
108108
opp-microvolt = <1000000>;
109109
clock-latency-ns = <500000>;
110110
};
111-
opp01 {
112-
opp-hz = /bits/ 64 <599999994>;
111+
opp-600000000 {
112+
opp-hz = /bits/ 64 <600000000>;
113113
opp-microvolt = <1000000>;
114114
clock-latency-ns = <500000>;
115115
};
116-
opp02 {
117-
opp-hz = /bits/ 64 <399999996>;
116+
opp-400000000 {
117+
opp-hz = /bits/ 64 <400000000>;
118118
opp-microvolt = <1000000>;
119119
clock-latency-ns = <500000>;
120120
};
121-
opp03 {
122-
opp-hz = /bits/ 64 <299999997>;
121+
opp-300000000 {
122+
opp-hz = /bits/ 64 <300000000>;
123123
opp-microvolt = <1000000>;
124124
clock-latency-ns = <500000>;
125125
};
@@ -192,11 +192,6 @@
192192
};
193193

194194
firmware {
195-
optee: optee {
196-
compatible = "linaro,optee-tz";
197-
method = "smc";
198-
};
199-
200195
zynqmp_firmware: zynqmp-firmware {
201196
compatible = "xlnx,zynqmp-firmware";
202197
#power-domain-cells = <1>;
@@ -1080,7 +1075,7 @@
10801075
};
10811076

10821077
spi0: spi@ff040000 {
1083-
compatible = "cdns,spi-r1p6";
1078+
compatible = "xlnx,zynqmp-spi-r1p6", "cdns,spi-r1p6";
10841079
status = "disabled";
10851080
interrupt-parent = <&gic>;
10861081
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
@@ -1092,7 +1087,7 @@
10921087
};
10931088

10941089
spi1: spi@ff050000 {
1095-
compatible = "cdns,spi-r1p6";
1090+
compatible = "xlnx,zynqmp-spi-r1p6", "cdns,spi-r1p6";
10961091
status = "disabled";
10971092
interrupt-parent = <&gic>;
10981093
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;

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