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arm64: dts: amazon: alpine-v2: move non-MMIO node out of soc
Non-MMIO devices should not be within simple-bus, as reported by dtc W=1 warning: alpine-v2.dtsi:100.9-106.5: Warning (simple_bus_reg): /soc/timer: missing or empty reg/ranges property alpine-v2.dtsi:108.7-114.5: Warning (simple_bus_reg): /soc/pmu: missing or empty reg/ranges property Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20240402200744.79349-2-krzk@kernel.org
1 parent 71ef9c6 commit 915f104

1 file changed

Lines changed: 17 additions & 16 deletions

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arch/arm64/boot/dts/amazon/alpine-v2.dtsi

Lines changed: 17 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -39,6 +39,7 @@
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/ {
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model = "Annapurna Labs Alpine v2";
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compatible = "al,alpine-v2";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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@@ -89,6 +90,22 @@
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clock-frequency = <1000000>;
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
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};
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pmu {
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compatible = "arm,armv8-pmuv3";
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interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <2>;
@@ -97,22 +114,6 @@
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interrupt-parent = <&gic>;
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ranges;
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100-
timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
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};
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pmu {
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compatible = "arm,armv8-pmuv3";
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interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
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};
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gic: interrupt-controller@f0200000 {
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compatible = "arm,gic-v3";
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reg = <0x0 0xf0200000 0x0 0x10000>, /* GIC Dist */

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