Skip to content

Commit 93beaa9

Browse files
bebarinobebarino
committed
Merge tag 'qcom-clk-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into clk-qcom
Pull Qualcomm clk driver updates from Bjorn Andersson: - New drivers to support global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650 - Global and RPMh clock support for the Qualcomm X1E80100 SoC - Support for the Stromer APCS PLL found in Qualcomm IPQ5018 - Add a new type of branch clock, with support for controlling separate memory control bits, to the Qualcomm clk driver - Use new branch type in Qualcomm ECPRI clk driver for QDU1000 and QRU1000 - Add a number of missing clocks related to CSI2 on Qualcomm MSM8939 - Add support for the camera clock controller on Qualcomm SC8280XP - Correct PLL configuration in GPU and video clock controllers for Qualcomm SM8150 - Add runtime PM support and a few missing resets to Qualcomm SM8150 video clock controller - Fix configuration of various GCC GDSCs on Qualcomm SM8550 - Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver - Fix up GPU and display clock controllers PLL configuration settings on Qualcomm SM8550 * tag 'qcom-clk-for-6.8' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (41 commits) clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config clk: qcom: dispcc-sm8550: Use the correct PLL configuration function clk: qcom: dispcc-sm8550: Update disp PLL settings clk: qcom: gpucc-sm8550: Update GPU PLL settings clk: qcom: gcc-sm8550: Mark RCGs shared where applicable clk: qcom: gcc-sm8550: use collapse-voting for PCIe GDSCs clk: qcom: gcc-sm8550: Mark the PCIe GDSCs votable clk: qcom: gcc-sm8550: Add the missing RETAIN_FF_ENABLE GDSC flag clk: qcom: camcc-sc8280xp: Prevent error pointer dereference clk: qcom: videocc-sm8150: Add runtime PM support clk: qcom: videocc-sm8150: Add missing PLL config property clk: qcom: videocc-sm8150: Update the videocc resets dt-bindings: clock: Update the videocc resets for sm8150 clk: qcom: rpmh: Add support for X1E80100 rpmh clocks clk: qcom: Add Global Clock controller (GCC) driver for X1E80100 dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for X1E80100 dt-bindings: clock: qcom: Add X1E80100 GCC clocks clk: qcom: Add ECPRICC driver support for QDU1000 and QRU1000 clk: qcom: branch: Add mem ops support for branch2 clocks ...
2 parents b85ea95 + 757d1ca commit 93beaa9

44 files changed

Lines changed: 20891 additions & 138 deletions

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

‎Documentation/devicetree/bindings/clock/qcom,a53pll.yaml‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@ description:
1616
properties:
1717
compatible:
1818
enum:
19+
- qcom,ipq5018-a53pll
1920
- qcom,ipq5332-a53pll
2021
- qcom,ipq6018-a53pll
2122
- qcom,ipq8074-a53pll

‎Documentation/devicetree/bindings/clock/qcom,camcc-sm8250.yaml‎

Lines changed: 4 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,9 @@ description: |
1515
1616
See also:: include/dt-bindings/clock/qcom,camcc-sm8250.h
1717
18+
allOf:
19+
- $ref: qcom,gcc.yaml#
20+
1821
properties:
1922
compatible:
2023
const: qcom,sm8250-camcc
@@ -33,15 +36,6 @@ properties:
3336
- const: bi_tcxo_ao
3437
- const: sleep_clk
3538

36-
'#clock-cells':
37-
const: 1
38-
39-
'#reset-cells':
40-
const: 1
41-
42-
'#power-domain-cells':
43-
const: 1
44-
4539
power-domains:
4640
items:
4741
- description: MMCX power domain
@@ -56,14 +50,10 @@ properties:
5650

5751
required:
5852
- compatible
59-
- reg
6053
- clocks
6154
- clock-names
62-
- '#clock-cells'
63-
- '#reset-cells'
64-
- '#power-domain-cells'
6555

66-
additionalProperties: false
56+
unevaluatedProperties: false
6757

6858
examples:
6959
- |

‎Documentation/devicetree/bindings/clock/qcom,gcc-ipq6018.yaml‎

Lines changed: 57 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,57 @@
1+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/clock/qcom,gcc-ipq6018.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: Qualcomm Global Clock & Reset Controller on IPQ6018
8+
9+
maintainers:
10+
- Stephen Boyd <sboyd@kernel.org>
11+
- Taniya Das <quic_tdas@quicinc.com>
12+
- Robert Marko <robimarko@gmail.com>
13+
14+
description: |
15+
Qualcomm global clock control module provides the clocks, resets and power
16+
domains on IPQ6018.
17+
18+
See also::
19+
include/dt-bindings/clock/qcom,gcc-ipq6018.h
20+
include/dt-bindings/reset/qcom,gcc-ipq6018.h
21+
22+
allOf:
23+
- $ref: qcom,gcc.yaml#
24+
25+
properties:
26+
compatible:
27+
const: qcom,gcc-ipq6018
28+
29+
clocks:
30+
items:
31+
- description: board XO clock
32+
- description: sleep clock
33+
34+
clock-names:
35+
items:
36+
- const: xo
37+
- const: sleep_clk
38+
39+
required:
40+
- compatible
41+
- clocks
42+
- clock-names
43+
44+
unevaluatedProperties: false
45+
46+
examples:
47+
- |
48+
clock-controller@1800000 {
49+
compatible = "qcom,gcc-ipq6018";
50+
reg = <0x01800000 0x80000>;
51+
clocks = <&xo>, <&sleep_clk>;
52+
clock-names = "xo", "sleep_clk";
53+
#clock-cells = <1>;
54+
#power-domain-cells = <1>;
55+
#reset-cells = <1>;
56+
};
57+
...

‎Documentation/devicetree/bindings/clock/qcom,gcc-other.yaml‎

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -15,8 +15,6 @@ description: |
1515
domains.
1616
1717
See also::
18-
include/dt-bindings/clock/qcom,gcc-ipq6018.h
19-
include/dt-bindings/reset/qcom,gcc-ipq6018.h
2018
include/dt-bindings/clock/qcom,gcc-msm8953.h
2119
include/dt-bindings/clock/qcom,gcc-mdm9607.h
2220
@@ -26,7 +24,6 @@ allOf:
2624
properties:
2725
compatible:
2826
enum:
29-
- qcom,gcc-ipq6018
3027
- qcom,gcc-mdm9607
3128

3229
required:

‎Documentation/devicetree/bindings/clock/qcom,qdu1000-ecpricc.yaml‎

Lines changed: 68 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,68 @@
1+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/clock/qcom,qdu1000-ecpricc.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: Qualcomm ECPRI Clock & Reset Controller for QDU1000 and QRU1000
8+
9+
maintainers:
10+
- Taniya Das <quic_tdas@quicinc.com>
11+
- Imran Shaik <quic_imrashai@quicinc.com>
12+
13+
description: |
14+
Qualcomm ECPRI Specification V2.0 Common Public Radio Interface clock control
15+
module which supports the clocks, resets on QDU1000 and QRU1000
16+
17+
See also:: include/dt-bindings/clock/qcom,qdu1000-ecpricc.h
18+
19+
properties:
20+
compatible:
21+
enum:
22+
- qcom,qdu1000-ecpricc
23+
24+
reg:
25+
maxItems: 1
26+
27+
clocks:
28+
items:
29+
- description: Board XO source
30+
- description: GPLL0 source from GCC
31+
- description: GPLL1 source from GCC
32+
- description: GPLL2 source from GCC
33+
- description: GPLL3 source from GCC
34+
- description: GPLL4 source from GCC
35+
- description: GPLL5 source from GCC
36+
37+
'#clock-cells':
38+
const: 1
39+
40+
'#reset-cells':
41+
const: 1
42+
43+
required:
44+
- compatible
45+
- reg
46+
- clocks
47+
- '#clock-cells'
48+
- '#reset-cells'
49+
50+
additionalProperties: false
51+
52+
examples:
53+
- |
54+
#include <dt-bindings/clock/qcom,qdu1000-gcc.h>
55+
#include <dt-bindings/clock/qcom,rpmh.h>
56+
clock-controller@280000 {
57+
compatible = "qcom,qdu1000-ecpricc";
58+
reg = <0x00280000 0x31c00>;
59+
clocks = <&rpmhcc RPMH_CXO_CLK>,
60+
<&gcc GCC_ECPRI_CC_GPLL0_CLK_SRC>,
61+
<&gcc GCC_ECPRI_CC_GPLL1_EVEN_CLK_SRC>,
62+
<&gcc GCC_ECPRI_CC_GPLL2_EVEN_CLK_SRC>,
63+
<&gcc GCC_ECPRI_CC_GPLL3_CLK_SRC>,
64+
<&gcc GCC_ECPRI_CC_GPLL4_CLK_SRC>,
65+
<&gcc GCC_ECPRI_CC_GPLL5_EVEN_CLK_SRC>;
66+
#clock-cells = <1>;
67+
#reset-cells = <1>;
68+
};

‎Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,8 @@ properties:
3535
- qcom,sm8350-rpmh-clk
3636
- qcom,sm8450-rpmh-clk
3737
- qcom,sm8550-rpmh-clk
38+
- qcom,sm8650-rpmh-clk
39+
- qcom,x1e80100-rpmh-clk
3840

3941
clocks:
4042
maxItems: 1

‎Documentation/devicetree/bindings/clock/qcom,sc7180-camcc.yaml‎

Lines changed: 4 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,9 @@ description: |
1515
1616
See also:: include/dt-bindings/clock/qcom,camcc-sc7180.h
1717
18+
allOf:
19+
- $ref: qcom,gcc.yaml#
20+
1821
properties:
1922
compatible:
2023
const: qcom,sc7180-camcc
@@ -31,28 +34,15 @@ properties:
3134
- const: iface
3235
- const: xo
3336

34-
'#clock-cells':
35-
const: 1
36-
37-
'#reset-cells':
38-
const: 1
39-
40-
'#power-domain-cells':
41-
const: 1
42-
4337
reg:
4438
maxItems: 1
4539

4640
required:
4741
- compatible
48-
- reg
4942
- clocks
5043
- clock-names
51-
- '#clock-cells'
52-
- '#reset-cells'
53-
- '#power-domain-cells'
5444

55-
additionalProperties: false
45+
unevaluatedProperties: false
5646

5747
examples:
5848
- |

‎Documentation/devicetree/bindings/clock/qcom,sc7280-camcc.yaml‎

Lines changed: 4 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,9 @@ description: |
1515
1616
See also:: include/dt-bindings/clock/qcom,camcc-sc7280.h
1717
18+
allOf:
19+
- $ref: qcom,gcc.yaml#
20+
1821
properties:
1922
compatible:
2023
const: qcom,sc7280-camcc
@@ -31,28 +34,15 @@ properties:
3134
- const: bi_tcxo_ao
3235
- const: sleep_clk
3336

34-
'#clock-cells':
35-
const: 1
36-
37-
'#reset-cells':
38-
const: 1
39-
40-
'#power-domain-cells':
41-
const: 1
42-
4337
reg:
4438
maxItems: 1
4539

4640
required:
4741
- compatible
48-
- reg
4942
- clocks
5043
- clock-names
51-
- '#clock-cells'
52-
- '#reset-cells'
53-
- '#power-domain-cells'
5444

55-
additionalProperties: false
45+
unevaluatedProperties: false
5646

5747
examples:
5848
- |

‎Documentation/devicetree/bindings/clock/qcom,sdm845-camcc.yaml‎

Lines changed: 4 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,9 @@ description: |
1515
1616
See also:: include/dt-bindings/clock/qcom,camcc-sm845.h
1717
18+
allOf:
19+
- $ref: qcom,gcc.yaml#
20+
1821
properties:
1922
compatible:
2023
const: qcom,sdm845-camcc
@@ -27,28 +30,15 @@ properties:
2730
items:
2831
- const: bi_tcxo
2932

30-
'#clock-cells':
31-
const: 1
32-
33-
'#reset-cells':
34-
const: 1
35-
36-
'#power-domain-cells':
37-
const: 1
38-
3933
reg:
4034
maxItems: 1
4135

4236
required:
4337
- compatible
44-
- reg
4538
- clocks
4639
- clock-names
47-
- '#clock-cells'
48-
- '#reset-cells'
49-
- '#power-domain-cells'
5040

51-
additionalProperties: false
41+
unevaluatedProperties: false
5242

5343
examples:
5444
- |

‎Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml‎

Lines changed: 6 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -16,10 +16,15 @@ description: |
1616
See also::
1717
include/dt-bindings/clock/qcom,sm8450-camcc.h
1818
include/dt-bindings/clock/qcom,sm8550-camcc.h
19+
include/dt-bindings/clock/qcom,sc8280xp-camcc.h
20+
21+
allOf:
22+
- $ref: qcom,gcc.yaml#
1923

2024
properties:
2125
compatible:
2226
enum:
27+
- qcom,sc8280xp-camcc
2328
- qcom,sm8450-camcc
2429
- qcom,sm8550-camcc
2530

@@ -40,29 +45,16 @@ properties:
4045
description:
4146
A phandle to an OPP node describing required MMCX performance point.
4247

43-
'#clock-cells':
44-
const: 1
45-
46-
'#reset-cells':
47-
const: 1
48-
49-
'#power-domain-cells':
50-
const: 1
51-
5248
reg:
5349
maxItems: 1
5450

5551
required:
5652
- compatible
57-
- reg
5853
- clocks
5954
- power-domains
6055
- required-opps
61-
- '#clock-cells'
62-
- '#reset-cells'
63-
- '#power-domain-cells'
6456

65-
additionalProperties: false
57+
unevaluatedProperties: false
6658

6759
examples:
6860
- |

0 commit comments

Comments
 (0)