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ISCAS-VulabWilliam Breathitt Gray
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counter: 104-quad-8: Fix incorrect return value in IRQ handler
quad8_irq_handler() should return irqreturn_t enum values, but it directly returns negative errno codes from regmap operations on error. Return IRQ_NONE if the interrupt status cannot be read. If clearing the interrupt fails, return IRQ_HANDLED to prevent the kernel from disabling the IRQ line due to a spurious interrupt storm. Also, log these regmap failures with dev_WARN_ONCE. Fixes: 98ffe02 ("counter: 104-quad-8: Migrate to the regmap API") Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Haotian Zhang <vulab@iscas.ac.cn> Link: https://lore.kernel.org/r/20251215020114.1913-1-vulab@iscas.ac.cn Cc: stable@vger.kernel.org Signed-off-by: William Breathitt Gray <wbg@kernel.org>
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Lines changed: 14 additions & 6 deletions

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drivers/counter/104-quad-8.c

Lines changed: 14 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1192,6 +1192,7 @@ static irqreturn_t quad8_irq_handler(int irq, void *private)
11921192
{
11931193
struct counter_device *counter = private;
11941194
struct quad8 *const priv = counter_priv(counter);
1195+
struct device *dev = counter->parent;
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unsigned int status;
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unsigned long irq_status;
11971198
unsigned long channel;
@@ -1200,8 +1201,11 @@ static irqreturn_t quad8_irq_handler(int irq, void *private)
12001201
int ret;
12011202

12021203
ret = regmap_read(priv->map, QUAD8_INTERRUPT_STATUS, &status);
1203-
if (ret)
1204-
return ret;
1204+
if (ret) {
1205+
dev_WARN_ONCE(dev, true,
1206+
"Attempt to read Interrupt Status Register failed: %d\n", ret);
1207+
return IRQ_NONE;
1208+
}
12051209
if (!status)
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return IRQ_NONE;
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@@ -1223,17 +1227,21 @@ static irqreturn_t quad8_irq_handler(int irq, void *private)
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break;
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default:
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/* should never reach this path */
1226-
WARN_ONCE(true, "invalid interrupt trigger function %u configured for channel %lu\n",
1227-
flg_pins, channel);
1230+
dev_WARN_ONCE(dev, true,
1231+
"invalid interrupt trigger function %u configured for channel %lu\n",
1232+
flg_pins, channel);
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continue;
12291234
}
12301235

12311236
counter_push_event(counter, event, channel);
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}
12331238

12341239
ret = regmap_write(priv->map, QUAD8_CHANNEL_OPERATION, CLEAR_PENDING_INTERRUPTS);
1235-
if (ret)
1236-
return ret;
1240+
if (ret) {
1241+
dev_WARN_ONCE(dev, true,
1242+
"Attempt to clear pending interrupts by writing to Channel Operation Register failed: %d\n", ret);
1243+
return IRQ_HANDLED;
1244+
}
12371245

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return IRQ_HANDLED;
12391247
}

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