Skip to content

Commit 989e465

Browse files
bebarinobebarino
committed
Merge tag 'clk-imx-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux into clk-imx
Pull i.MX clk driver updates from Abel Vesa: - Remove CLK_SET_RATE_PARENT flag from LDB clocks on i.MX6SX - Keep UART clocks enabled during kernel boot if earlycon is set - Drop the imx_unregister_clocks as there are no users for it - Switch to _safe iterator on imx_clk_scu_unregister to avoid use after free - Add determine_rate op to the imx8m composite clock - Use device managed API for iomap and kzalloc for i.MXRT1050, i.MX8MN, i.MX8MP and i.MX93 clock controller drivers - Add missing interrupt DT property for the i.MX8M clock controller * tag 'clk-imx-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux: clk: imx: clk-imx8mp: improve error handling in imx8mp_clocks_probe() clk: imx93: fix memory leak and missing unwind goto in imx93_clocks_probe clk: imx: clk-imx8mn: fix memory leak in imx8mn_clocks_probe dt-bindings: clock: imx8m: Add missing interrupt property clk: imx: clk-imxrt1050: fix memory leak in imxrt1050_clocks_probe clk: imx: composite-8m: Add imx8m_divider_determine_rate clk: imx: scu: use _safe list iterator to avoid a use after free clk: imx: drop imx_unregister_clocks clk: imx6ul: retain early UART clocks during kernel init clk: imx: imx6sx: Remove CLK_SET_RATE_PARENT from the LDB clocks
2 parents ac9a786 + 878b02d commit 989e465

11 files changed

Lines changed: 82 additions & 44 deletions

File tree

‎Documentation/devicetree/bindings/clock/imx8m-clock.yaml‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,9 @@ properties:
2424
reg:
2525
maxItems: 1
2626

27+
interrupts:
28+
maxItems: 2
29+
2730
clocks:
2831
minItems: 6
2932
maxItems: 7

‎drivers/clk/imx/clk-composite-8m.c‎

Lines changed: 31 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -119,10 +119,41 @@ static int imx8m_clk_composite_divider_set_rate(struct clk_hw *hw,
119119
return ret;
120120
}
121121

122+
static int imx8m_divider_determine_rate(struct clk_hw *hw,
123+
struct clk_rate_request *req)
124+
{
125+
struct clk_divider *divider = to_clk_divider(hw);
126+
int prediv_value;
127+
int div_value;
128+
129+
/* if read only, just return current value */
130+
if (divider->flags & CLK_DIVIDER_READ_ONLY) {
131+
u32 val;
132+
133+
val = readl(divider->reg);
134+
prediv_value = val >> divider->shift;
135+
prediv_value &= clk_div_mask(divider->width);
136+
prediv_value++;
137+
138+
div_value = val >> PCG_DIV_SHIFT;
139+
div_value &= clk_div_mask(PCG_DIV_WIDTH);
140+
div_value++;
141+
142+
return divider_ro_determine_rate(hw, req, divider->table,
143+
PCG_PREDIV_WIDTH + PCG_DIV_WIDTH,
144+
divider->flags, prediv_value * div_value);
145+
}
146+
147+
return divider_determine_rate(hw, req, divider->table,
148+
PCG_PREDIV_WIDTH + PCG_DIV_WIDTH,
149+
divider->flags);
150+
}
151+
122152
static const struct clk_ops imx8m_clk_composite_divider_ops = {
123153
.recalc_rate = imx8m_clk_composite_divider_recalc_rate,
124154
.round_rate = imx8m_clk_composite_divider_round_rate,
125155
.set_rate = imx8m_clk_composite_divider_set_rate,
156+
.determine_rate = imx8m_divider_determine_rate,
126157
};
127158

128159
static u8 imx8m_clk_composite_mux_get_parent(struct clk_hw *hw)

‎drivers/clk/imx/clk-imx6sx.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -302,10 +302,10 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node)
302302
hws[IMX6SX_CLK_CKO2_SEL] = imx_clk_hw_mux("cko2_sel", base + 0x60, 16, 5, cko2_sels, ARRAY_SIZE(cko2_sels));
303303
hws[IMX6SX_CLK_CKO] = imx_clk_hw_mux("cko", base + 0x60, 8, 1, cko_sels, ARRAY_SIZE(cko_sels));
304304

305-
hws[IMX6SX_CLK_LDB_DI1_DIV_SEL] = imx_clk_hw_mux_flags("ldb_di1_div_sel", base + 0x20, 11, 1, ldb_di1_div_sels, ARRAY_SIZE(ldb_di1_div_sels), CLK_SET_RATE_PARENT);
306-
hws[IMX6SX_CLK_LDB_DI0_DIV_SEL] = imx_clk_hw_mux_flags("ldb_di0_div_sel", base + 0x20, 10, 1, ldb_di0_div_sels, ARRAY_SIZE(ldb_di0_div_sels), CLK_SET_RATE_PARENT);
307-
hws[IMX6SX_CLK_LDB_DI1_SEL] = imx_clk_hw_mux_flags("ldb_di1_sel", base + 0x2c, 12, 3, ldb_di1_sels, ARRAY_SIZE(ldb_di1_sels), CLK_SET_RATE_PARENT);
308-
hws[IMX6SX_CLK_LDB_DI0_SEL] = imx_clk_hw_mux_flags("ldb_di0_sel", base + 0x2c, 9, 3, ldb_di0_sels, ARRAY_SIZE(ldb_di0_sels), CLK_SET_RATE_PARENT);
305+
hws[IMX6SX_CLK_LDB_DI1_DIV_SEL] = imx_clk_hw_mux("ldb_di1_div_sel", base + 0x20, 11, 1, ldb_di1_div_sels, ARRAY_SIZE(ldb_di1_div_sels));
306+
hws[IMX6SX_CLK_LDB_DI0_DIV_SEL] = imx_clk_hw_mux("ldb_di0_div_sel", base + 0x20, 10, 1, ldb_di0_div_sels, ARRAY_SIZE(ldb_di0_div_sels));
307+
hws[IMX6SX_CLK_LDB_DI1_SEL] = imx_clk_hw_mux("ldb_di1_sel", base + 0x2c, 12, 3, ldb_di1_sels, ARRAY_SIZE(ldb_di1_sels));
308+
hws[IMX6SX_CLK_LDB_DI0_SEL] = imx_clk_hw_mux("ldb_di0_sel", base + 0x2c, 9, 3, ldb_di0_sels, ARRAY_SIZE(ldb_di0_sels));
309309
hws[IMX6SX_CLK_LCDIF1_PRE_SEL] = imx_clk_hw_mux_flags("lcdif1_pre_sel", base + 0x38, 15, 3, lcdif1_pre_sels, ARRAY_SIZE(lcdif1_pre_sels), CLK_SET_RATE_PARENT);
310310
hws[IMX6SX_CLK_LCDIF1_SEL] = imx_clk_hw_mux_flags("lcdif1_sel", base + 0x38, 9, 3, lcdif1_sels, ARRAY_SIZE(lcdif1_sels), CLK_SET_RATE_PARENT);
311311

‎drivers/clk/imx/clk-imx6ul.c‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -544,6 +544,8 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node)
544544

545545
clk_set_parent(hws[IMX6UL_CLK_ENET1_REF_SEL]->clk, hws[IMX6UL_CLK_ENET_REF]->clk);
546546
clk_set_parent(hws[IMX6UL_CLK_ENET2_REF_SEL]->clk, hws[IMX6UL_CLK_ENET2_REF]->clk);
547+
548+
imx_register_uart_clocks();
547549
}
548550

549551
CLK_OF_DECLARE(imx6ul, "fsl,imx6ul-ccm", imx6ul_clocks_init);

‎drivers/clk/imx/clk-imx8mn.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -323,7 +323,7 @@ static int imx8mn_clocks_probe(struct platform_device *pdev)
323323
void __iomem *base;
324324
int ret;
325325

326-
clk_hw_data = kzalloc(struct_size(clk_hw_data, hws,
326+
clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws,
327327
IMX8MN_CLK_END), GFP_KERNEL);
328328
if (WARN_ON(!clk_hw_data))
329329
return -ENOMEM;
@@ -340,10 +340,10 @@ static int imx8mn_clocks_probe(struct platform_device *pdev)
340340
hws[IMX8MN_CLK_EXT4] = imx_get_clk_hw_by_name(np, "clk_ext4");
341341

342342
np = of_find_compatible_node(NULL, NULL, "fsl,imx8mn-anatop");
343-
base = of_iomap(np, 0);
343+
base = devm_of_iomap(dev, np, 0, NULL);
344344
of_node_put(np);
345-
if (WARN_ON(!base)) {
346-
ret = -ENOMEM;
345+
if (WARN_ON(IS_ERR(base))) {
346+
ret = PTR_ERR(base);
347347
goto unregister_hws;
348348
}
349349

‎drivers/clk/imx/clk-imx8mp.c‎

Lines changed: 13 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -414,25 +414,22 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
414414
struct device *dev = &pdev->dev;
415415
struct device_node *np;
416416
void __iomem *anatop_base, *ccm_base;
417+
int err;
417418

418419
np = of_find_compatible_node(NULL, NULL, "fsl,imx8mp-anatop");
419-
anatop_base = of_iomap(np, 0);
420+
anatop_base = devm_of_iomap(dev, np, 0, NULL);
420421
of_node_put(np);
421-
if (WARN_ON(!anatop_base))
422-
return -ENOMEM;
422+
if (WARN_ON(IS_ERR(anatop_base)))
423+
return PTR_ERR(anatop_base);
423424

424425
np = dev->of_node;
425426
ccm_base = devm_platform_ioremap_resource(pdev, 0);
426-
if (WARN_ON(IS_ERR(ccm_base))) {
427-
iounmap(anatop_base);
427+
if (WARN_ON(IS_ERR(ccm_base)))
428428
return PTR_ERR(ccm_base);
429-
}
430429

431-
clk_hw_data = kzalloc(struct_size(clk_hw_data, hws, IMX8MP_CLK_END), GFP_KERNEL);
432-
if (WARN_ON(!clk_hw_data)) {
433-
iounmap(anatop_base);
430+
clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws, IMX8MP_CLK_END), GFP_KERNEL);
431+
if (WARN_ON(!clk_hw_data))
434432
return -ENOMEM;
435-
}
436433

437434
clk_hw_data->num = IMX8MP_CLK_END;
438435
hws = clk_hw_data->hws;
@@ -722,7 +719,12 @@ static int imx8mp_clocks_probe(struct platform_device *pdev)
722719

723720
imx_check_clk_hws(hws, IMX8MP_CLK_END);
724721

725-
of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data);
722+
err = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data);
723+
if (err < 0) {
724+
dev_err(dev, "failed to register hws for i.MX8MP\n");
725+
imx_unregister_hw_clocks(hws, IMX8MP_CLK_END);
726+
return err;
727+
}
726728

727729
imx_register_uart_clocks();
728730

‎drivers/clk/imx/clk-imx93.c‎

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -264,7 +264,7 @@ static int imx93_clocks_probe(struct platform_device *pdev)
264264
void __iomem *base, *anatop_base;
265265
int i, ret;
266266

267-
clk_hw_data = kzalloc(struct_size(clk_hw_data, hws,
267+
clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws,
268268
IMX93_CLK_END), GFP_KERNEL);
269269
if (!clk_hw_data)
270270
return -ENOMEM;
@@ -288,10 +288,12 @@ static int imx93_clocks_probe(struct platform_device *pdev)
288288
"sys_pll_pfd2", 1, 2);
289289

290290
np = of_find_compatible_node(NULL, NULL, "fsl,imx93-anatop");
291-
anatop_base = of_iomap(np, 0);
291+
anatop_base = devm_of_iomap(dev, np, 0, NULL);
292292
of_node_put(np);
293-
if (WARN_ON(!anatop_base))
294-
return -ENOMEM;
293+
if (WARN_ON(IS_ERR(anatop_base))) {
294+
ret = PTR_ERR(base);
295+
goto unregister_hws;
296+
}
295297

296298
clks[IMX93_CLK_ARM_PLL] = imx_clk_fracn_gppll_integer("arm_pll", "osc_24m",
297299
anatop_base + 0x1000,
@@ -304,8 +306,8 @@ static int imx93_clocks_probe(struct platform_device *pdev)
304306
np = dev->of_node;
305307
base = devm_platform_ioremap_resource(pdev, 0);
306308
if (WARN_ON(IS_ERR(base))) {
307-
iounmap(anatop_base);
308-
return PTR_ERR(base);
309+
ret = PTR_ERR(base);
310+
goto unregister_hws;
309311
}
310312

311313
for (i = 0; i < ARRAY_SIZE(root_array); i++) {
@@ -345,7 +347,6 @@ static int imx93_clocks_probe(struct platform_device *pdev)
345347

346348
unregister_hws:
347349
imx_unregister_hw_clocks(clks, IMX93_CLK_END);
348-
iounmap(anatop_base);
349350

350351
return ret;
351352
}

‎drivers/clk/imx/clk-imxrt1050.c‎

Lines changed: 15 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@ static int imxrt1050_clocks_probe(struct platform_device *pdev)
4242
struct device_node *anp;
4343
int ret;
4444

45-
clk_hw_data = kzalloc(struct_size(clk_hw_data, hws,
45+
clk_hw_data = devm_kzalloc(dev, struct_size(clk_hw_data, hws,
4646
IMXRT1050_CLK_END), GFP_KERNEL);
4747
if (WARN_ON(!clk_hw_data))
4848
return -ENOMEM;
@@ -53,10 +53,12 @@ static int imxrt1050_clocks_probe(struct platform_device *pdev)
5353
hws[IMXRT1050_CLK_OSC] = imx_get_clk_hw_by_name(np, "osc");
5454

5555
anp = of_find_compatible_node(NULL, NULL, "fsl,imxrt-anatop");
56-
pll_base = of_iomap(anp, 0);
56+
pll_base = devm_of_iomap(dev, anp, 0, NULL);
5757
of_node_put(anp);
58-
if (WARN_ON(!pll_base))
59-
return -ENOMEM;
58+
if (WARN_ON(IS_ERR(pll_base))) {
59+
ret = PTR_ERR(pll_base);
60+
goto unregister_hws;
61+
}
6062

6163
/* Anatop clocks */
6264
hws[IMXRT1050_CLK_DUMMY] = imx_clk_hw_fixed("dummy", 0UL);
@@ -104,8 +106,10 @@ static int imxrt1050_clocks_probe(struct platform_device *pdev)
104106

105107
/* CCM clocks */
106108
ccm_base = devm_platform_ioremap_resource(pdev, 0);
107-
if (WARN_ON(IS_ERR(ccm_base)))
108-
return PTR_ERR(ccm_base);
109+
if (WARN_ON(IS_ERR(ccm_base))) {
110+
ret = PTR_ERR(ccm_base);
111+
goto unregister_hws;
112+
}
109113

110114
hws[IMXRT1050_CLK_ARM_PODF] = imx_clk_hw_divider("arm_podf", "pll1_arm", ccm_base + 0x10, 0, 3);
111115
hws[IMXRT1050_CLK_PRE_PERIPH_SEL] = imx_clk_hw_mux("pre_periph_sel", ccm_base + 0x18, 18, 2,
@@ -149,8 +153,12 @@ static int imxrt1050_clocks_probe(struct platform_device *pdev)
149153
ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data);
150154
if (ret < 0) {
151155
dev_err(dev, "Failed to register clks for i.MXRT1050.\n");
152-
imx_unregister_hw_clocks(hws, IMXRT1050_CLK_END);
156+
goto unregister_hws;
153157
}
158+
return 0;
159+
160+
unregister_hws:
161+
imx_unregister_hw_clocks(hws, IMXRT1050_CLK_END);
154162
return ret;
155163
}
156164
static const struct of_device_id imxrt1050_clk_of_match[] = {

‎drivers/clk/imx/clk-scu.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -707,11 +707,11 @@ struct clk_hw *imx_clk_scu_alloc_dev(const char *name,
707707

708708
void imx_clk_scu_unregister(void)
709709
{
710-
struct imx_scu_clk_node *clk;
710+
struct imx_scu_clk_node *clk, *n;
711711
int i;
712712

713713
for (i = 0; i < IMX_SC_R_LAST; i++) {
714-
list_for_each_entry(clk, &imx_scu_clks[i], node) {
714+
list_for_each_entry_safe(clk, n, &imx_scu_clks[i], node) {
715715
clk_hw_unregister(clk->hw);
716716
kfree(clk);
717717
}

‎drivers/clk/imx/clk.c‎

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -20,14 +20,6 @@ EXPORT_SYMBOL_GPL(imx_ccm_lock);
2020
bool mcore_booted;
2121
EXPORT_SYMBOL_GPL(mcore_booted);
2222

23-
void imx_unregister_clocks(struct clk *clks[], unsigned int count)
24-
{
25-
unsigned int i;
26-
27-
for (i = 0; i < count; i++)
28-
clk_unregister(clks[i]);
29-
}
30-
3123
void imx_unregister_hw_clocks(struct clk_hw *hws[], unsigned int count)
3224
{
3325
unsigned int i;

0 commit comments

Comments
 (0)