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Commit 9b2c25f

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bjorn-helgaasbjorn-helgaas
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Merge branch 'remotes/lorenzo/pci/mvebu'
- Add Pali Rohár as pci-mvebu.c maintainer (Pali Rohár) - Make struct pci_bridge_emul_ops const (Pali Rohár) - Rename PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR to PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD since it doesn't apply to BARs (Pali Rohár) - Add new flag PCI_BRIDGE_EMUL_NO_IO_FORWARD for bridges that don't support IO forwarding (Pali Rohár) - Add Kconfig help text for CONFIG_PCI_MVEBU (Pali Rohár) - Remove duplicate nports assignment (Pali Rohár) - Set PCI_BRIDGE_EMUL_NO_IO_FORWARD when IO is unsupported (Pali Rohár) - Initialize vendor, device and revision of emulated bridge (Pali Rohár) - Fix Data Link Layer Link Active reporting on emulated bridge (Pali Rohár) - Rearrange tests in bridge emulation for easier maintenance (Russell King) - Add emulated bridge support for PCIe extended capabilities (Russell King) - Add emulated bridge support for bridge Subsystem Vendor ID capability (Pali Rohár) - Configure Maximum Link Width based on DT "num-lanes" property (Pali Rohár) - Emulate bridge Subsystem Vendor ID capability (Pali Rohár) - Emulate AER Capability (Pali Rohár) - Use PCI core bridge->ops and bridge->child_ops to separate config accesses to Root Port vs downstream devices (Pali Rohár) - Unmask all INTx interrupts; they're reported via a single shared GIC source (Pali Rohár) - Add INTx support (Pali Rohár) * remotes/lorenzo/pci/mvebu: PCI: mvebu: Implement support for legacy INTx interrupts PCI: mvebu: Fix macro names and comments about legacy interrupts dt-bindings: PCI: mvebu: Update information about intx interrupts PCI: mvebu: Use child_ops API PCI: mvebu: Add support for Advanced Error Reporting registers on emulated bridge PCI: mvebu: Add support for PCI Bridge Subsystem Vendor ID on emulated bridge PCI: mvebu: Correctly configure x1/x4 mode dt-bindings: PCI: mvebu: Add num-lanes property PCI: pci-bridge-emul: Add support for PCI Bridge Subsystem Vendor ID capability PCI: pci-bridge-emul: Add support for PCIe extended capabilities PCI: pci-bridge-emul: Re-arrange register tests PCI: mvebu: Fix reporting Data Link Layer Link Active on emulated bridge PCI: mvebu: Update comment for PCI_EXP_LNKCTL register on emulated bridge PCI: mvebu: Update comment for PCI_EXP_LNKCAP register on emulated bridge PCI: mvebu: Properly initialize vendor, device and revision of emulated bridge PCI: mvebu: Set PCI_BRIDGE_EMUL_NO_IO_FORWARD when IO is unsupported PCI: mvebu: Remove duplicate nports assignment PCI: mvebu: Add help string for CONFIG_PCI_MVEBU option PCI: pci-bridge-emul: Add support for new flag PCI_BRIDGE_EMUL_NO_IO_FORWARD PCI: pci-bridge-emul: Rename PCI_BRIDGE_EMUL_NO_PREFETCHABLE_BAR to PCI_BRIDGE_EMUL_NO_PREFMEM_FORWARD PCI: pci-bridge-emul: Make struct pci_bridge_emul_ops as const MAINTAINERS: Add Pali Rohár as pci-mvebu.c maintainer
2 parents 0888e08 + ec07526 commit 9b2c25f

7 files changed

Lines changed: 506 additions & 140 deletions

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‎Documentation/devicetree/bindings/pci/mvebu-pci.txt‎

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@@ -77,9 +77,15 @@ and the following optional properties:
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- marvell,pcie-lane: the physical PCIe lane number, for ports having
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multiple lanes. If this property is not found, we assume that the
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value is 0.
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- num-lanes: number of SerDes PCIe lanes for this link (1 or 4)
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- reset-gpios: optional GPIO to PERST#
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- reset-delay-us: delay in us to wait after reset de-assertion, if not
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specified will default to 100ms, as required by the PCIe specification.
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- interrupt-names: list of interrupt names, supported are:
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- "intx" - interrupt line triggered by one of the legacy interrupt
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- interrupts or interrupts-extended: List of the interrupt sources which
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corresponding to the "interrupt-names". If non-empty then also additional
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'interrupt-controller' subnode must be defined.
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Example:
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@@ -141,6 +147,7 @@ pcie-controller {
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interrupt-map = <0 0 0 0 &mpic 58>;
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marvell,pcie-port = <0>;
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marvell,pcie-lane = <0>;
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num-lanes = <1>;
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/* low-active PERST# reset on GPIO 25 */
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reset-gpios = <&gpio0 25 1>;
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/* wait 20ms for device settle after reset deassertion */
@@ -161,6 +168,7 @@ pcie-controller {
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interrupt-map = <0 0 0 0 &mpic 59>;
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marvell,pcie-port = <0>;
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marvell,pcie-lane = <1>;
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num-lanes = <1>;
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clocks = <&gateclk 6>;
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};
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@@ -177,6 +185,7 @@ pcie-controller {
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interrupt-map = <0 0 0 0 &mpic 60>;
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marvell,pcie-port = <0>;
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marvell,pcie-lane = <2>;
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num-lanes = <1>;
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clocks = <&gateclk 7>;
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};
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@@ -193,6 +202,7 @@ pcie-controller {
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interrupt-map = <0 0 0 0 &mpic 61>;
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marvell,pcie-port = <0>;
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marvell,pcie-lane = <3>;
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num-lanes = <1>;
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clocks = <&gateclk 8>;
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};
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@@ -209,6 +219,7 @@ pcie-controller {
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interrupt-map = <0 0 0 0 &mpic 62>;
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marvell,pcie-port = <1>;
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marvell,pcie-lane = <0>;
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num-lanes = <1>;
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clocks = <&gateclk 9>;
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};
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@@ -225,6 +236,7 @@ pcie-controller {
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interrupt-map = <0 0 0 0 &mpic 63>;
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marvell,pcie-port = <1>;
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marvell,pcie-lane = <1>;
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num-lanes = <1>;
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clocks = <&gateclk 10>;
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};
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@@ -241,6 +253,7 @@ pcie-controller {
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interrupt-map = <0 0 0 0 &mpic 64>;
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marvell,pcie-port = <1>;
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marvell,pcie-lane = <2>;
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num-lanes = <1>;
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clocks = <&gateclk 11>;
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};
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@@ -257,6 +270,7 @@ pcie-controller {
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interrupt-map = <0 0 0 0 &mpic 65>;
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marvell,pcie-port = <1>;
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marvell,pcie-lane = <3>;
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num-lanes = <1>;
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clocks = <&gateclk 12>;
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};
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@@ -273,6 +287,7 @@ pcie-controller {
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interrupt-map = <0 0 0 0 &mpic 99>;
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marvell,pcie-port = <2>;
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marvell,pcie-lane = <0>;
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num-lanes = <1>;
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clocks = <&gateclk 26>;
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};
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@@ -289,6 +304,7 @@ pcie-controller {
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interrupt-map = <0 0 0 0 &mpic 103>;
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marvell,pcie-port = <3>;
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marvell,pcie-lane = <0>;
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num-lanes = <1>;
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clocks = <&gateclk 27>;
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};
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};

‎MAINTAINERS‎

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@@ -14784,6 +14784,7 @@ F: drivers/pci/controller/mobiveil/pcie-mobiveil*
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PCI DRIVER FOR MVEBU (Marvell Armada 370 and Armada XP SOC support)
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M: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
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M: Pali Rohár <pali@kernel.org>
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L: linux-pci@vger.kernel.org
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained

‎drivers/pci/controller/Kconfig‎

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@@ -10,6 +10,10 @@ config PCI_MVEBU
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depends on ARM
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depends on OF
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select PCI_BRIDGE_EMUL
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help
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Add support for Marvell EBU PCIe controller. This PCIe controller
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is used on 32-bit Marvell ARM SoCs: Dove, Kirkwood, Armada 370,
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Armada XP, Armada 375, Armada 38x and Armada 39x.
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config PCI_AARDVARK
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tristate "Aardvark PCIe controller"

‎drivers/pci/controller/pci-aardvark.c‎

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@@ -945,7 +945,7 @@ advk_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
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}
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}
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static struct pci_bridge_emul_ops advk_pci_bridge_emul_ops = {
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static const struct pci_bridge_emul_ops advk_pci_bridge_emul_ops = {
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.read_base = advk_pci_bridge_emul_base_conf_read,
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.write_base = advk_pci_bridge_emul_base_conf_write,
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.read_pcie = advk_pci_bridge_emul_pcie_conf_read,

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