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Merge tag 'kvm-riscv-6.8-1' of https://github.com/kvm-riscv/linux into HEAD
KVM/riscv changes for 6.8 part #1 - KVM_GET_REG_LIST improvement for vector registers - Generate ISA extension reg_list using macros in get-reg-list selftest - Steal time account support along with selftest
2 parents 731859d + aad86da commit 9cc5262

294 files changed

Lines changed: 3924 additions & 2344 deletions

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.mailmap

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@@ -191,6 +191,10 @@ Gao Xiang <xiang@kernel.org> <gaoxiang25@huawei.com>
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Gao Xiang <xiang@kernel.org> <hsiangkao@aol.com>
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Gao Xiang <xiang@kernel.org> <hsiangkao@linux.alibaba.com>
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Gao Xiang <xiang@kernel.org> <hsiangkao@redhat.com>
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Geliang Tang <geliang.tang@linux.dev> <geliang.tang@suse.com>
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Geliang Tang <geliang.tang@linux.dev> <geliangtang@xiaomi.com>
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Geliang Tang <geliang.tang@linux.dev> <geliangtang@gmail.com>
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Geliang Tang <geliang.tang@linux.dev> <geliangtang@163.com>
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Georgi Djakov <djakov@kernel.org> <georgi.djakov@linaro.org>
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Gerald Schaefer <gerald.schaefer@linux.ibm.com> <geraldsc@de.ibm.com>
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Gerald Schaefer <gerald.schaefer@linux.ibm.com> <gerald.schaefer@de.ibm.com>

Documentation/admin-guide/kernel-parameters.txt

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@@ -3985,9 +3985,9 @@
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vulnerability. System may allow data leaks with this
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option.
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no-steal-acc [X86,PV_OPS,ARM64,PPC/PSERIES] Disable paravirtualized
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steal time accounting. steal time is computed, but
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won't influence scheduler behaviour
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no-steal-acc [X86,PV_OPS,ARM64,PPC/PSERIES,RISCV] Disable
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paravirtualized steal time accounting. steal time is
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computed, but won't influence scheduler behaviour
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nosync [HW,M68K] Disables sync negotiation for all devices.
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Documentation/devicetree/bindings/nvmem/mxs-ocotp.yaml

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@@ -15,9 +15,11 @@ allOf:
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properties:
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compatible:
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enum:
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- fsl,imx23-ocotp
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- fsl,imx28-ocotp
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items:
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- enum:
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- fsl,imx23-ocotp
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- fsl,imx28-ocotp
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- const: fsl,ocotp
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reg:
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maxItems: 1
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examples:
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- |
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ocotp: efuse@8002c000 {
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compatible = "fsl,imx28-ocotp";
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compatible = "fsl,imx28-ocotp", "fsl,ocotp";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x8002c000 0x2000>;

MAINTAINERS

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@@ -6050,10 +6050,8 @@ M: Mikulas Patocka <mpatocka@redhat.com>
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M: dm-devel@lists.linux.dev
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L: dm-devel@lists.linux.dev
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S: Maintained
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W: http://sources.redhat.com/dm
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Q: http://patchwork.kernel.org/project/dm-devel/list/
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/device-mapper/linux-dm.git
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T: quilt http://people.redhat.com/agk/patches/linux/editing/
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F: Documentation/admin-guide/device-mapper/
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F: drivers/md/Kconfig
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F: drivers/md/Makefile
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HISILICON NETWORK SUBSYSTEM 3 DRIVER (HNS3)
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M: Yisen Zhuang <yisen.zhuang@huawei.com>
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M: Salil Mehta <salil.mehta@huawei.com>
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M: Jijie Shao <shaojijie@huawei.com>
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L: netdev@vger.kernel.org
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S: Maintained
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W: http://www.hisilicon.com

Makefile

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VERSION = 6
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PATCHLEVEL = 7
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SUBLEVEL = 0
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EXTRAVERSION = -rc6
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EXTRAVERSION = -rc7
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NAME = Hurr durr I'ma ninja sloth
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# *DOCUMENTATION*

arch/arc/Kconfig

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select OF
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select OF_EARLY_FLATTREE
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select PCI_SYSCALL if PCI
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select PERF_USE_VMALLOC if ARC_CACHE_VIPT_ALIASING
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select HAVE_ARCH_JUMP_LABEL if ISA_ARCV2 && !CPU_ENDIAN_BE32
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select TRACE_IRQFLAGS_SUPPORT
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@@ -232,10 +231,6 @@ config ARC_CACHE_PAGES
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Note that Global I/D ENABLE + Per Page DISABLE works but corollary
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Global DISABLE + Per Page ENABLE won't work
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config ARC_CACHE_VIPT_ALIASING
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bool "Support VIPT Aliasing D$"
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depends on ARC_HAS_DCACHE && ISA_ARCOMPACT
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endif #ARC_CACHE
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config ARC_HAS_ICCM

arch/arc/include/asm/cacheflush.h

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@@ -44,60 +44,17 @@ void dma_cache_wback(phys_addr_t start, unsigned long sz);
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#define flush_cache_dup_mm(mm) /* called on fork (VIVT only) */
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#ifndef CONFIG_ARC_CACHE_VIPT_ALIASING
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#define flush_cache_mm(mm) /* called on munmap/exit */
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#define flush_cache_range(mm, u_vstart, u_vend)
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#define flush_cache_page(vma, u_vaddr, pfn) /* PF handling/COW-break */
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#else /* VIPT aliasing dcache */
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/* To clear out stale userspace mappings */
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void flush_cache_mm(struct mm_struct *mm);
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void flush_cache_range(struct vm_area_struct *vma,
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unsigned long start,unsigned long end);
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void flush_cache_page(struct vm_area_struct *vma,
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unsigned long user_addr, unsigned long page);
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/*
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* To make sure that userspace mapping is flushed to memory before
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* get_user_pages() uses a kernel mapping to access the page
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*/
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#define ARCH_HAS_FLUSH_ANON_PAGE
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void flush_anon_page(struct vm_area_struct *vma,
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struct page *page, unsigned long u_vaddr);
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#endif /* CONFIG_ARC_CACHE_VIPT_ALIASING */
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/*
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* A new pagecache page has PG_arch_1 clear - thus dcache dirty by default
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* This works around some PIO based drivers which don't call flush_dcache_page
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* to record that they dirtied the dcache
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*/
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#define PG_dc_clean PG_arch_1
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#define CACHE_COLORS_NUM 4
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#define CACHE_COLORS_MSK (CACHE_COLORS_NUM - 1)
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#define CACHE_COLOR(addr) (((unsigned long)(addr) >> (PAGE_SHIFT)) & CACHE_COLORS_MSK)
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/*
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* Simple wrapper over config option
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* Bootup code ensures that hardware matches kernel configuration
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*/
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static inline int cache_is_vipt_aliasing(void)
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{
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return IS_ENABLED(CONFIG_ARC_CACHE_VIPT_ALIASING);
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}
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/*
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* checks if two addresses (after page aligning) index into same cache set
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*/
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#define addr_not_cache_congruent(addr1, addr2) \
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({ \
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cache_is_vipt_aliasing() ? \
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(CACHE_COLOR(addr1) != CACHE_COLOR(addr2)) : 0; \
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})
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#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
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do { \
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memcpy(dst, src, len); \

arch/arc/include/asm/entry-arcv2.h

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/* M = 8-1 N = 8 */
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.endm
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.macro SAVE_ABI_CALLEE_REGS
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push r13
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push r14
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push r15
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push r16
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push r17
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push r18
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push r19
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push r20
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push r21
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push r22
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push r23
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push r24
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push r25
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.endm
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.macro RESTORE_ABI_CALLEE_REGS
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pop r25
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pop r24
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pop r23
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pop r22
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pop r21
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pop r20
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pop r19
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pop r18
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pop r17
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pop r16
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pop r15
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pop r14
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pop r13
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.endm
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#endif

arch/arc/include/asm/entry-compact.h

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#include <asm/irqflags-compact.h>
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#include <asm/thread_info.h> /* For THREAD_SIZE */
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/* Note on the LD/ST addr modes with addr reg wback
37+
*
38+
* LD.a same as LD.aw
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*
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* LD.a reg1, [reg2, x] => Pre Incr
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* Eff Addr for load = [reg2 + x]
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*
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* LD.ab reg1, [reg2, x] => Post Incr
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* Eff Addr for load = [reg2]
45+
*/
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.macro PUSHAX aux
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lr r9, [\aux]
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push r9
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.endm
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.macro POPAX aux
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pop r9
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sr r9, [\aux]
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.endm
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.macro SAVE_R0_TO_R12
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push r0
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push r1
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push r2
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push r3
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push r4
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push r5
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push r6
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push r7
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push r8
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push r9
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push r10
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push r11
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push r12
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.endm
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.macro RESTORE_R12_TO_R0
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pop r12
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pop r11
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pop r10
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pop r9
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pop r8
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pop r7
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pop r6
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pop r5
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pop r4
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pop r3
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pop r2
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pop r1
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pop r0
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.endm
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.macro SAVE_ABI_CALLEE_REGS
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push r13
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push r14
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push r15
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push r16
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push r17
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push r18
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push r19
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push r20
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push r21
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push r22
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push r23
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push r24
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push r25
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.endm
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.macro RESTORE_ABI_CALLEE_REGS
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pop r25
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pop r24
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pop r23
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pop r22
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pop r21
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pop r20
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pop r19
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pop r18
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pop r17
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pop r16
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pop r15
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pop r14
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pop r13
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.endm
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/*--------------------------------------------------------------
37122
* Switch to Kernel Mode stack if SP points to User Mode stack
38123
*
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SWITCH_TO_KERNEL_STK
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238-
PUSH 0x003\LVL\()abcd /* Dummy ECR */
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st.a 0x003\LVL\()abcd, [sp, -4] /* Dummy ECR */
239324
sub sp, sp, 8 /* skip orig_r0 (not needed)
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skip pt_regs->sp, already saved above */
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