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mtd: spi-nor: micron-st: sort flash_info database
The flash ID is the new primary key into our database. Sort the entry by it. Keep the most specific ones first, because there might be ID collisions between shorter and longer ones. Signed-off-by: Michael Walle <mwalle@kernel.org> Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-36-e60548861b10@kernel.org Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
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Lines changed: 168 additions & 168 deletions

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‎drivers/mtd/spi-nor/micron-st.c‎

Lines changed: 168 additions & 168 deletions
Original file line numberDiff line numberDiff line change
@@ -182,133 +182,35 @@ static const struct flash_info micron_nor_parts[] = {
182182

183183
static const struct flash_info st_nor_parts[] = {
184184
{
185-
.id = SNOR_ID(0x20, 0xbb, 0x15),
186-
.name = "n25q016a",
187-
.size = SZ_2M,
188-
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
189-
}, {
190-
.id = SNOR_ID(0x20, 0xba, 0x16),
191-
.name = "n25q032",
192-
.size = SZ_4M,
193-
.no_sfdp_flags = SPI_NOR_QUAD_READ,
194-
}, {
195-
.id = SNOR_ID(0x20, 0xbb, 0x16),
196-
.name = "n25q032a",
197-
.size = SZ_4M,
198-
.no_sfdp_flags = SPI_NOR_QUAD_READ,
199-
}, {
200-
.id = SNOR_ID(0x20, 0xba, 0x17),
201-
.name = "n25q064",
202-
.size = SZ_8M,
203-
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
204-
}, {
205-
.id = SNOR_ID(0x20, 0xbb, 0x17),
206-
.name = "n25q064a",
207-
.size = SZ_8M,
208-
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
209-
}, {
210-
.id = SNOR_ID(0x20, 0xbb, 0x18),
211-
.name = "n25q128a11",
212-
.size = SZ_16M,
213-
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
214-
SPI_NOR_BP3_SR_BIT6,
215-
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
216-
.mfr_flags = USE_FSR,
217-
}, {
218-
.id = SNOR_ID(0x20, 0xba, 0x18),
219-
.name = "n25q128a13",
220-
.size = SZ_16M,
221-
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
222-
SPI_NOR_BP3_SR_BIT6,
223-
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
224-
.mfr_flags = USE_FSR,
225-
}, {
226-
.id = SNOR_ID(0x20, 0xba, 0x19, 0x10, 0x44, 0x00),
227-
.name = "mt25ql256a",
228-
.size = SZ_32M,
229-
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
230-
.fixup_flags = SPI_NOR_4B_OPCODES,
231-
.mfr_flags = USE_FSR,
232-
}, {
233-
.id = SNOR_ID(0x20, 0xba, 0x19),
234-
.name = "n25q256a",
235-
.size = SZ_32M,
236-
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
237-
.mfr_flags = USE_FSR,
238-
}, {
239-
.id = SNOR_ID(0x20, 0xbb, 0x19, 0x10, 0x44, 0x00),
240-
.name = "mt25qu256a",
241-
.size = SZ_32M,
242-
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
243-
SPI_NOR_BP3_SR_BIT6,
244-
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
245-
.fixup_flags = SPI_NOR_4B_OPCODES,
246-
.mfr_flags = USE_FSR,
247-
}, {
248-
.id = SNOR_ID(0x20, 0xbb, 0x19),
249-
.name = "n25q256ax1",
250-
.size = SZ_32M,
251-
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
252-
.mfr_flags = USE_FSR,
185+
.name = "m25p05-nonjedec",
186+
.sector_size = SZ_32K,
187+
.size = SZ_64K,
253188
}, {
254-
.id = SNOR_ID(0x20, 0xba, 0x20, 0x10, 0x44, 0x00),
255-
.name = "mt25ql512a",
256-
.size = SZ_64M,
257-
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
258-
.fixup_flags = SPI_NOR_4B_OPCODES,
259-
.mfr_flags = USE_FSR,
189+
.name = "m25p10-nonjedec",
190+
.sector_size = SZ_32K,
191+
.size = SZ_128K,
260192
}, {
261-
.id = SNOR_ID(0x20, 0xba, 0x20),
262-
.name = "n25q512ax3",
263-
.size = SZ_64M,
264-
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
265-
SPI_NOR_BP3_SR_BIT6,
266-
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
267-
.mfr_flags = USE_FSR,
193+
.name = "m25p20-nonjedec",
194+
.size = SZ_256K,
268195
}, {
269-
.id = SNOR_ID(0x20, 0xbb, 0x20, 0x10, 0x44, 0x00),
270-
.name = "mt25qu512a",
271-
.size = SZ_64M,
272-
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
273-
.fixup_flags = SPI_NOR_4B_OPCODES,
274-
.mfr_flags = USE_FSR,
196+
.name = "m25p40-nonjedec",
197+
.size = SZ_512K,
275198
}, {
276-
.id = SNOR_ID(0x20, 0xbb, 0x20),
277-
.name = "n25q512a",
278-
.size = SZ_64M,
279-
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
280-
SPI_NOR_BP3_SR_BIT6,
281-
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
282-
.mfr_flags = USE_FSR,
199+
.name = "m25p80-nonjedec",
200+
.size = SZ_1M,
283201
}, {
284-
.id = SNOR_ID(0x20, 0xba, 0x21),
285-
.name = "n25q00",
286-
.size = SZ_128M,
287-
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
288-
SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE,
289-
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
290-
.mfr_flags = USE_FSR,
202+
.name = "m25p16-nonjedec",
203+
.size = SZ_2M,
291204
}, {
292-
.id = SNOR_ID(0x20, 0xbb, 0x21),
293-
.name = "n25q00a",
294-
.size = SZ_128M,
295-
.flags = NO_CHIP_ERASE,
296-
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
297-
.mfr_flags = USE_FSR,
205+
.name = "m25p32-nonjedec",
206+
.size = SZ_4M,
298207
}, {
299-
.id = SNOR_ID(0x20, 0xba, 0x22),
300-
.name = "mt25ql02g",
301-
.size = SZ_256M,
302-
.flags = NO_CHIP_ERASE,
303-
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
304-
.mfr_flags = USE_FSR,
208+
.name = "m25p64-nonjedec",
209+
.size = SZ_8M,
305210
}, {
306-
.id = SNOR_ID(0x20, 0xbb, 0x22),
307-
.name = "mt25qu02g",
308-
.size = SZ_256M,
309-
.flags = NO_CHIP_ERASE,
310-
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
311-
.mfr_flags = USE_FSR,
211+
.name = "m25p128-nonjedec",
212+
.sector_size = SZ_256K,
213+
.size = SZ_16M,
312214
}, {
313215
.id = SNOR_ID(0x20, 0x20, 0x10),
314216
.name = "m25p05",
@@ -348,36 +250,6 @@ static const struct flash_info st_nor_parts[] = {
348250
.name = "m25p128",
349251
.sector_size = SZ_256K,
350252
.size = SZ_16M,
351-
}, {
352-
.name = "m25p05-nonjedec",
353-
.sector_size = SZ_32K,
354-
.size = SZ_64K,
355-
}, {
356-
.name = "m25p10-nonjedec",
357-
.sector_size = SZ_32K,
358-
.size = SZ_128K,
359-
}, {
360-
.name = "m25p20-nonjedec",
361-
.size = SZ_256K,
362-
}, {
363-
.name = "m25p40-nonjedec",
364-
.size = SZ_512K,
365-
}, {
366-
.name = "m25p80-nonjedec",
367-
.size = SZ_1M,
368-
}, {
369-
.name = "m25p16-nonjedec",
370-
.size = SZ_2M,
371-
}, {
372-
.name = "m25p32-nonjedec",
373-
.size = SZ_4M,
374-
}, {
375-
.name = "m25p64-nonjedec",
376-
.size = SZ_8M,
377-
}, {
378-
.name = "m25p128-nonjedec",
379-
.sector_size = SZ_256K,
380-
.size = SZ_16M,
381253
}, {
382254
.id = SNOR_ID(0x20, 0x40, 0x11),
383255
.name = "m45pe10",
@@ -391,18 +263,14 @@ static const struct flash_info st_nor_parts[] = {
391263
.name = "m45pe16",
392264
.size = SZ_2M,
393265
}, {
394-
.id = SNOR_ID(0x20, 0x80, 0x12),
395-
.name = "m25pe20",
396-
.size = SZ_256K,
266+
.id = SNOR_ID(0x20, 0x63, 0x16),
267+
.name = "m25px32-s1",
268+
.size = SZ_4M,
269+
.no_sfdp_flags = SECT_4K,
397270
}, {
398-
.id = SNOR_ID(0x20, 0x80, 0x14),
399-
.name = "m25pe80",
271+
.id = SNOR_ID(0x20, 0x71, 0x14),
272+
.name = "m25px80",
400273
.size = SZ_1M,
401-
}, {
402-
.id = SNOR_ID(0x20, 0x80, 0x15),
403-
.name = "m25pe16",
404-
.size = SZ_2M,
405-
.no_sfdp_flags = SECT_4K,
406274
}, {
407275
.id = SNOR_ID(0x20, 0x71, 0x15),
408276
.name = "m25px16",
@@ -413,25 +281,157 @@ static const struct flash_info st_nor_parts[] = {
413281
.name = "m25px32",
414282
.size = SZ_4M,
415283
.no_sfdp_flags = SECT_4K,
284+
}, {
285+
.id = SNOR_ID(0x20, 0x71, 0x17),
286+
.name = "m25px64",
287+
.size = SZ_8M,
416288
}, {
417289
.id = SNOR_ID(0x20, 0x73, 0x16),
418290
.name = "m25px32-s0",
419291
.size = SZ_4M,
420292
.no_sfdp_flags = SECT_4K,
421293
}, {
422-
.id = SNOR_ID(0x20, 0x63, 0x16),
423-
.name = "m25px32-s1",
424-
.size = SZ_4M,
294+
.id = SNOR_ID(0x20, 0x80, 0x12),
295+
.name = "m25pe20",
296+
.size = SZ_256K,
297+
}, {
298+
.id = SNOR_ID(0x20, 0x80, 0x14),
299+
.name = "m25pe80",
300+
.size = SZ_1M,
301+
}, {
302+
.id = SNOR_ID(0x20, 0x80, 0x15),
303+
.name = "m25pe16",
304+
.size = SZ_2M,
425305
.no_sfdp_flags = SECT_4K,
426306
}, {
427-
.id = SNOR_ID(0x20, 0x71, 0x17),
428-
.name = "m25px64",
307+
.id = SNOR_ID(0x20, 0xba, 0x16),
308+
.name = "n25q032",
309+
.size = SZ_4M,
310+
.no_sfdp_flags = SPI_NOR_QUAD_READ,
311+
}, {
312+
.id = SNOR_ID(0x20, 0xba, 0x17),
313+
.name = "n25q064",
429314
.size = SZ_8M,
315+
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
430316
}, {
431-
.id = SNOR_ID(0x20, 0x71, 0x14),
432-
.name = "m25px80",
433-
.size = SZ_1M,
434-
},
317+
.id = SNOR_ID(0x20, 0xba, 0x18),
318+
.name = "n25q128a13",
319+
.size = SZ_16M,
320+
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
321+
SPI_NOR_BP3_SR_BIT6,
322+
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
323+
.mfr_flags = USE_FSR,
324+
}, {
325+
.id = SNOR_ID(0x20, 0xba, 0x19, 0x10, 0x44, 0x00),
326+
.name = "mt25ql256a",
327+
.size = SZ_32M,
328+
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
329+
.fixup_flags = SPI_NOR_4B_OPCODES,
330+
.mfr_flags = USE_FSR,
331+
}, {
332+
.id = SNOR_ID(0x20, 0xba, 0x19),
333+
.name = "n25q256a",
334+
.size = SZ_32M,
335+
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
336+
.mfr_flags = USE_FSR,
337+
}, {
338+
.id = SNOR_ID(0x20, 0xba, 0x20, 0x10, 0x44, 0x00),
339+
.name = "mt25ql512a",
340+
.size = SZ_64M,
341+
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
342+
.fixup_flags = SPI_NOR_4B_OPCODES,
343+
.mfr_flags = USE_FSR,
344+
}, {
345+
.id = SNOR_ID(0x20, 0xba, 0x20),
346+
.name = "n25q512ax3",
347+
.size = SZ_64M,
348+
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
349+
SPI_NOR_BP3_SR_BIT6,
350+
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
351+
.mfr_flags = USE_FSR,
352+
}, {
353+
.id = SNOR_ID(0x20, 0xba, 0x21),
354+
.name = "n25q00",
355+
.size = SZ_128M,
356+
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
357+
SPI_NOR_BP3_SR_BIT6 | NO_CHIP_ERASE,
358+
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
359+
.mfr_flags = USE_FSR,
360+
}, {
361+
.id = SNOR_ID(0x20, 0xba, 0x22),
362+
.name = "mt25ql02g",
363+
.size = SZ_256M,
364+
.flags = NO_CHIP_ERASE,
365+
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
366+
.mfr_flags = USE_FSR,
367+
}, {
368+
.id = SNOR_ID(0x20, 0xbb, 0x15),
369+
.name = "n25q016a",
370+
.size = SZ_2M,
371+
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
372+
}, {
373+
.id = SNOR_ID(0x20, 0xbb, 0x16),
374+
.name = "n25q032a",
375+
.size = SZ_4M,
376+
.no_sfdp_flags = SPI_NOR_QUAD_READ,
377+
}, {
378+
.id = SNOR_ID(0x20, 0xbb, 0x17),
379+
.name = "n25q064a",
380+
.size = SZ_8M,
381+
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
382+
}, {
383+
.id = SNOR_ID(0x20, 0xbb, 0x18),
384+
.name = "n25q128a11",
385+
.size = SZ_16M,
386+
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
387+
SPI_NOR_BP3_SR_BIT6,
388+
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
389+
.mfr_flags = USE_FSR,
390+
}, {
391+
.id = SNOR_ID(0x20, 0xbb, 0x19, 0x10, 0x44, 0x00),
392+
.name = "mt25qu256a",
393+
.size = SZ_32M,
394+
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
395+
SPI_NOR_BP3_SR_BIT6,
396+
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
397+
.fixup_flags = SPI_NOR_4B_OPCODES,
398+
.mfr_flags = USE_FSR,
399+
}, {
400+
.id = SNOR_ID(0x20, 0xbb, 0x19),
401+
.name = "n25q256ax1",
402+
.size = SZ_32M,
403+
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
404+
.mfr_flags = USE_FSR,
405+
}, {
406+
.id = SNOR_ID(0x20, 0xbb, 0x20, 0x10, 0x44, 0x00),
407+
.name = "mt25qu512a",
408+
.size = SZ_64M,
409+
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
410+
.fixup_flags = SPI_NOR_4B_OPCODES,
411+
.mfr_flags = USE_FSR,
412+
}, {
413+
.id = SNOR_ID(0x20, 0xbb, 0x20),
414+
.name = "n25q512a",
415+
.size = SZ_64M,
416+
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4BIT_BP |
417+
SPI_NOR_BP3_SR_BIT6,
418+
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
419+
.mfr_flags = USE_FSR,
420+
}, {
421+
.id = SNOR_ID(0x20, 0xbb, 0x21),
422+
.name = "n25q00a",
423+
.size = SZ_128M,
424+
.flags = NO_CHIP_ERASE,
425+
.no_sfdp_flags = SECT_4K | SPI_NOR_QUAD_READ,
426+
.mfr_flags = USE_FSR,
427+
}, {
428+
.id = SNOR_ID(0x20, 0xbb, 0x22),
429+
.name = "mt25qu02g",
430+
.size = SZ_256M,
431+
.flags = NO_CHIP_ERASE,
432+
.no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
433+
.mfr_flags = USE_FSR,
434+
}
435435
};
436436

437437
/**

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