Skip to content

Commit 9e72869

Browse files
Headcrabedbroonie
Headcrabed
authored and
broonie
committed
regulator: axp20x: Add AXP15060 support
The AXP15060 is a typical I2C-controlled PMIC, seen on multiple boards with different default register value. Current driver is tested on Starfive Visionfive 2. The RTCLDO is fixed, and cannot even be turned on or off. On top of that, its voltage is customisable (either 1.8V or 3.3V). We pretend it's a fixed 1.8V regulator since other AXP driver also do like this. Also, BSP code ignores this regulator and it's not used according to VF2 schematic. Describe the AXP15060's voltage settings and switch registers, how the voltages are encoded, and connect this to the MFD device via its regulator ID. Signed-off-by: Shengyu Qu <wiagn233@outlook.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Mark Brown <broonie@kernel.org> Tested-by: Shengyu Qu <wiagn233@outlook.com> Link: https://lore.kernel.org/r/20230524000012.15028-4-andre.przywara@arm.com Signed-off-by: Mark Brown <broonie@kernel.org>
1 parent 60fd7eb commit 9e72869

1 file changed

Lines changed: 223 additions & 9 deletions

File tree

‎drivers/regulator/axp20x-regulator.c‎

Lines changed: 223 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -275,6 +275,74 @@
275275

276276
#define AXP813_PWR_OUT_DCDC7_MASK BIT_MASK(6)
277277

278+
#define AXP15060_DCDC1_V_CTRL_MASK GENMASK(4, 0)
279+
#define AXP15060_DCDC2_V_CTRL_MASK GENMASK(6, 0)
280+
#define AXP15060_DCDC3_V_CTRL_MASK GENMASK(6, 0)
281+
#define AXP15060_DCDC4_V_CTRL_MASK GENMASK(6, 0)
282+
#define AXP15060_DCDC5_V_CTRL_MASK GENMASK(6, 0)
283+
#define AXP15060_DCDC6_V_CTRL_MASK GENMASK(4, 0)
284+
#define AXP15060_ALDO1_V_CTRL_MASK GENMASK(4, 0)
285+
#define AXP15060_ALDO2_V_CTRL_MASK GENMASK(4, 0)
286+
#define AXP15060_ALDO3_V_CTRL_MASK GENMASK(4, 0)
287+
#define AXP15060_ALDO4_V_CTRL_MASK GENMASK(4, 0)
288+
#define AXP15060_ALDO5_V_CTRL_MASK GENMASK(4, 0)
289+
#define AXP15060_BLDO1_V_CTRL_MASK GENMASK(4, 0)
290+
#define AXP15060_BLDO2_V_CTRL_MASK GENMASK(4, 0)
291+
#define AXP15060_BLDO3_V_CTRL_MASK GENMASK(4, 0)
292+
#define AXP15060_BLDO4_V_CTRL_MASK GENMASK(4, 0)
293+
#define AXP15060_BLDO5_V_CTRL_MASK GENMASK(4, 0)
294+
#define AXP15060_CLDO1_V_CTRL_MASK GENMASK(4, 0)
295+
#define AXP15060_CLDO2_V_CTRL_MASK GENMASK(4, 0)
296+
#define AXP15060_CLDO3_V_CTRL_MASK GENMASK(4, 0)
297+
#define AXP15060_CLDO4_V_CTRL_MASK GENMASK(5, 0)
298+
#define AXP15060_CPUSLDO_V_CTRL_MASK GENMASK(3, 0)
299+
300+
#define AXP15060_PWR_OUT_DCDC1_MASK BIT_MASK(0)
301+
#define AXP15060_PWR_OUT_DCDC2_MASK BIT_MASK(1)
302+
#define AXP15060_PWR_OUT_DCDC3_MASK BIT_MASK(2)
303+
#define AXP15060_PWR_OUT_DCDC4_MASK BIT_MASK(3)
304+
#define AXP15060_PWR_OUT_DCDC5_MASK BIT_MASK(4)
305+
#define AXP15060_PWR_OUT_DCDC6_MASK BIT_MASK(5)
306+
#define AXP15060_PWR_OUT_ALDO1_MASK BIT_MASK(0)
307+
#define AXP15060_PWR_OUT_ALDO2_MASK BIT_MASK(1)
308+
#define AXP15060_PWR_OUT_ALDO3_MASK BIT_MASK(2)
309+
#define AXP15060_PWR_OUT_ALDO4_MASK BIT_MASK(3)
310+
#define AXP15060_PWR_OUT_ALDO5_MASK BIT_MASK(4)
311+
#define AXP15060_PWR_OUT_BLDO1_MASK BIT_MASK(5)
312+
#define AXP15060_PWR_OUT_BLDO2_MASK BIT_MASK(6)
313+
#define AXP15060_PWR_OUT_BLDO3_MASK BIT_MASK(7)
314+
#define AXP15060_PWR_OUT_BLDO4_MASK BIT_MASK(0)
315+
#define AXP15060_PWR_OUT_BLDO5_MASK BIT_MASK(1)
316+
#define AXP15060_PWR_OUT_CLDO1_MASK BIT_MASK(2)
317+
#define AXP15060_PWR_OUT_CLDO2_MASK BIT_MASK(3)
318+
#define AXP15060_PWR_OUT_CLDO3_MASK BIT_MASK(4)
319+
#define AXP15060_PWR_OUT_CLDO4_MASK BIT_MASK(5)
320+
#define AXP15060_PWR_OUT_CPUSLDO_MASK BIT_MASK(6)
321+
#define AXP15060_PWR_OUT_SW_MASK BIT_MASK(7)
322+
323+
#define AXP15060_DCDC23_POLYPHASE_DUAL_MASK BIT_MASK(6)
324+
#define AXP15060_DCDC46_POLYPHASE_DUAL_MASK BIT_MASK(7)
325+
326+
#define AXP15060_DCDC234_500mV_START 0x00
327+
#define AXP15060_DCDC234_500mV_STEPS 70
328+
#define AXP15060_DCDC234_500mV_END \
329+
(AXP15060_DCDC234_500mV_START + AXP15060_DCDC234_500mV_STEPS)
330+
#define AXP15060_DCDC234_1220mV_START 0x47
331+
#define AXP15060_DCDC234_1220mV_STEPS 16
332+
#define AXP15060_DCDC234_1220mV_END \
333+
(AXP15060_DCDC234_1220mV_START + AXP15060_DCDC234_1220mV_STEPS)
334+
#define AXP15060_DCDC234_NUM_VOLTAGES 88
335+
336+
#define AXP15060_DCDC5_800mV_START 0x00
337+
#define AXP15060_DCDC5_800mV_STEPS 32
338+
#define AXP15060_DCDC5_800mV_END \
339+
(AXP15060_DCDC5_800mV_START + AXP15060_DCDC5_800mV_STEPS)
340+
#define AXP15060_DCDC5_1140mV_START 0x21
341+
#define AXP15060_DCDC5_1140mV_STEPS 35
342+
#define AXP15060_DCDC5_1140mV_END \
343+
(AXP15060_DCDC5_1140mV_START + AXP15060_DCDC5_1140mV_STEPS)
344+
#define AXP15060_DCDC5_NUM_VOLTAGES 69
345+
278346
#define AXP_DESC_IO(_family, _id, _match, _supply, _min, _max, _step, _vreg, \
279347
_vmask, _ereg, _emask, _enable_val, _disable_val) \
280348
[_family##_##_id] = { \
@@ -1048,6 +1116,104 @@ static const struct regulator_desc axp813_regulators[] = {
10481116
AXP22X_PWR_OUT_CTRL2, AXP22X_PWR_OUT_DC1SW_MASK),
10491117
};
10501118

1119+
static const struct linear_range axp15060_dcdc234_ranges[] = {
1120+
REGULATOR_LINEAR_RANGE(500000,
1121+
AXP15060_DCDC234_500mV_START,
1122+
AXP15060_DCDC234_500mV_END,
1123+
10000),
1124+
REGULATOR_LINEAR_RANGE(1220000,
1125+
AXP15060_DCDC234_1220mV_START,
1126+
AXP15060_DCDC234_1220mV_END,
1127+
20000),
1128+
};
1129+
1130+
static const struct linear_range axp15060_dcdc5_ranges[] = {
1131+
REGULATOR_LINEAR_RANGE(800000,
1132+
AXP15060_DCDC5_800mV_START,
1133+
AXP15060_DCDC5_800mV_END,
1134+
10000),
1135+
REGULATOR_LINEAR_RANGE(1140000,
1136+
AXP15060_DCDC5_1140mV_START,
1137+
AXP15060_DCDC5_1140mV_END,
1138+
20000),
1139+
};
1140+
1141+
static const struct regulator_desc axp15060_regulators[] = {
1142+
AXP_DESC(AXP15060, DCDC1, "dcdc1", "vin1", 1500, 3400, 100,
1143+
AXP15060_DCDC1_V_CTRL, AXP15060_DCDC1_V_CTRL_MASK,
1144+
AXP15060_PWR_OUT_CTRL1, AXP15060_PWR_OUT_DCDC1_MASK),
1145+
AXP_DESC_RANGES(AXP15060, DCDC2, "dcdc2", "vin2",
1146+
axp15060_dcdc234_ranges, AXP15060_DCDC234_NUM_VOLTAGES,
1147+
AXP15060_DCDC2_V_CTRL, AXP15060_DCDC2_V_CTRL_MASK,
1148+
AXP15060_PWR_OUT_CTRL1, AXP15060_PWR_OUT_DCDC2_MASK),
1149+
AXP_DESC_RANGES(AXP15060, DCDC3, "dcdc3", "vin3",
1150+
axp15060_dcdc234_ranges, AXP15060_DCDC234_NUM_VOLTAGES,
1151+
AXP15060_DCDC3_V_CTRL, AXP15060_DCDC3_V_CTRL_MASK,
1152+
AXP15060_PWR_OUT_CTRL1, AXP15060_PWR_OUT_DCDC3_MASK),
1153+
AXP_DESC_RANGES(AXP15060, DCDC4, "dcdc4", "vin4",
1154+
axp15060_dcdc234_ranges, AXP15060_DCDC234_NUM_VOLTAGES,
1155+
AXP15060_DCDC4_V_CTRL, AXP15060_DCDC4_V_CTRL_MASK,
1156+
AXP15060_PWR_OUT_CTRL1, AXP15060_PWR_OUT_DCDC4_MASK),
1157+
AXP_DESC_RANGES(AXP15060, DCDC5, "dcdc5", "vin5",
1158+
axp15060_dcdc5_ranges, AXP15060_DCDC5_NUM_VOLTAGES,
1159+
AXP15060_DCDC5_V_CTRL, AXP15060_DCDC5_V_CTRL_MASK,
1160+
AXP15060_PWR_OUT_CTRL1, AXP15060_PWR_OUT_DCDC5_MASK),
1161+
AXP_DESC(AXP15060, DCDC6, "dcdc6", "vin6", 500, 3400, 100,
1162+
AXP15060_DCDC6_V_CTRL, AXP15060_DCDC6_V_CTRL_MASK,
1163+
AXP15060_PWR_OUT_CTRL1, AXP15060_PWR_OUT_DCDC6_MASK),
1164+
AXP_DESC(AXP15060, ALDO1, "aldo1", "aldoin", 700, 3300, 100,
1165+
AXP15060_ALDO1_V_CTRL, AXP15060_ALDO1_V_CTRL_MASK,
1166+
AXP15060_PWR_OUT_CTRL2, AXP15060_PWR_OUT_ALDO1_MASK),
1167+
AXP_DESC(AXP15060, ALDO2, "aldo2", "aldoin", 700, 3300, 100,
1168+
AXP15060_ALDO2_V_CTRL, AXP15060_ALDO2_V_CTRL_MASK,
1169+
AXP15060_PWR_OUT_CTRL2, AXP15060_PWR_OUT_ALDO2_MASK),
1170+
AXP_DESC(AXP15060, ALDO3, "aldo3", "aldoin", 700, 3300, 100,
1171+
AXP15060_ALDO3_V_CTRL, AXP15060_ALDO3_V_CTRL_MASK,
1172+
AXP15060_PWR_OUT_CTRL2, AXP15060_PWR_OUT_ALDO3_MASK),
1173+
AXP_DESC(AXP15060, ALDO4, "aldo4", "aldoin", 700, 3300, 100,
1174+
AXP15060_ALDO4_V_CTRL, AXP15060_ALDO4_V_CTRL_MASK,
1175+
AXP15060_PWR_OUT_CTRL2, AXP15060_PWR_OUT_ALDO4_MASK),
1176+
AXP_DESC(AXP15060, ALDO5, "aldo5", "aldoin", 700, 3300, 100,
1177+
AXP15060_ALDO5_V_CTRL, AXP15060_ALDO5_V_CTRL_MASK,
1178+
AXP15060_PWR_OUT_CTRL2, AXP15060_PWR_OUT_ALDO5_MASK),
1179+
AXP_DESC(AXP15060, BLDO1, "bldo1", "bldoin", 700, 3300, 100,
1180+
AXP15060_BLDO1_V_CTRL, AXP15060_BLDO1_V_CTRL_MASK,
1181+
AXP15060_PWR_OUT_CTRL2, AXP15060_PWR_OUT_BLDO1_MASK),
1182+
AXP_DESC(AXP15060, BLDO2, "bldo2", "bldoin", 700, 3300, 100,
1183+
AXP15060_BLDO2_V_CTRL, AXP15060_BLDO2_V_CTRL_MASK,
1184+
AXP15060_PWR_OUT_CTRL2, AXP15060_PWR_OUT_BLDO2_MASK),
1185+
AXP_DESC(AXP15060, BLDO3, "bldo3", "bldoin", 700, 3300, 100,
1186+
AXP15060_BLDO3_V_CTRL, AXP15060_BLDO3_V_CTRL_MASK,
1187+
AXP15060_PWR_OUT_CTRL2, AXP15060_PWR_OUT_BLDO3_MASK),
1188+
AXP_DESC(AXP15060, BLDO4, "bldo4", "bldoin", 700, 3300, 100,
1189+
AXP15060_BLDO4_V_CTRL, AXP15060_BLDO4_V_CTRL_MASK,
1190+
AXP15060_PWR_OUT_CTRL3, AXP15060_PWR_OUT_BLDO4_MASK),
1191+
AXP_DESC(AXP15060, BLDO5, "bldo5", "bldoin", 700, 3300, 100,
1192+
AXP15060_BLDO5_V_CTRL, AXP15060_BLDO5_V_CTRL_MASK,
1193+
AXP15060_PWR_OUT_CTRL3, AXP15060_PWR_OUT_BLDO5_MASK),
1194+
AXP_DESC(AXP15060, CLDO1, "cldo1", "cldoin", 700, 3300, 100,
1195+
AXP15060_CLDO1_V_CTRL, AXP15060_CLDO1_V_CTRL_MASK,
1196+
AXP15060_PWR_OUT_CTRL3, AXP15060_PWR_OUT_CLDO1_MASK),
1197+
AXP_DESC(AXP15060, CLDO2, "cldo2", "cldoin", 700, 3300, 100,
1198+
AXP15060_CLDO2_V_CTRL, AXP15060_CLDO2_V_CTRL_MASK,
1199+
AXP15060_PWR_OUT_CTRL3, AXP15060_PWR_OUT_CLDO2_MASK),
1200+
AXP_DESC(AXP15060, CLDO3, "cldo3", "cldoin", 700, 3300, 100,
1201+
AXP15060_CLDO3_V_CTRL, AXP15060_CLDO3_V_CTRL_MASK,
1202+
AXP15060_PWR_OUT_CTRL3, AXP15060_PWR_OUT_CLDO3_MASK),
1203+
AXP_DESC(AXP15060, CLDO4, "cldo4", "cldoin", 700, 4200, 100,
1204+
AXP15060_CLDO4_V_CTRL, AXP15060_CLDO4_V_CTRL_MASK,
1205+
AXP15060_PWR_OUT_CTRL3, AXP15060_PWR_OUT_CLDO4_MASK),
1206+
/* Supply comes from DCDC5 */
1207+
AXP_DESC(AXP15060, CPUSLDO, "cpusldo", NULL, 700, 1400, 50,
1208+
AXP15060_CPUSLDO_V_CTRL, AXP15060_CPUSLDO_V_CTRL_MASK,
1209+
AXP15060_PWR_OUT_CTRL3, AXP15060_PWR_OUT_CPUSLDO_MASK),
1210+
/* Supply comes from DCDC1 */
1211+
AXP_DESC_SW(AXP15060, SW, "sw", NULL,
1212+
AXP15060_PWR_OUT_CTRL3, AXP15060_PWR_OUT_SW_MASK),
1213+
/* Supply comes from ALDO1 */
1214+
AXP_DESC_FIXED(AXP15060, RTC_LDO, "rtc-ldo", NULL, 1800),
1215+
};
1216+
10511217
static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq)
10521218
{
10531219
struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent);
@@ -1088,10 +1254,11 @@ static int axp20x_set_dcdc_freq(struct platform_device *pdev, u32 dcdcfreq)
10881254
step = 150;
10891255
break;
10901256
case AXP313A_ID:
1257+
case AXP15060_ID:
10911258
/* The DCDC PWM frequency seems to be fixed to 3 MHz. */
10921259
if (dcdcfreq != 0) {
10931260
dev_err(&pdev->dev,
1094-
"DCDC frequency on AXP313a is fixed to 3 MHz.\n");
1261+
"DCDC frequency on this PMIC is fixed to 3 MHz.\n");
10951262
return -EINVAL;
10961263
}
10971264

@@ -1201,6 +1368,15 @@ static int axp20x_set_dcdc_workmode(struct regulator_dev *rdev, int id, u32 work
12011368
workmode <<= id - AXP813_DCDC1;
12021369
break;
12031370

1371+
case AXP15060_ID:
1372+
reg = AXP15060_DCDC_MODE_CTRL2;
1373+
if (id < AXP15060_DCDC1 || id > AXP15060_DCDC6)
1374+
return -EINVAL;
1375+
1376+
mask = AXP22X_WORKMODE_DCDCX_MASK(id - AXP15060_DCDC1);
1377+
workmode <<= id - AXP15060_DCDC1;
1378+
break;
1379+
12041380
default:
12051381
/* should not happen */
12061382
WARN_ON(1);
@@ -1220,7 +1396,7 @@ static bool axp20x_is_polyphase_slave(struct axp20x_dev *axp20x, int id)
12201396

12211397
/*
12221398
* Currently in our supported AXP variants, only AXP803, AXP806,
1223-
* and AXP813 have polyphase regulators.
1399+
* AXP813 and AXP15060 have polyphase regulators.
12241400
*/
12251401
switch (axp20x->variant) {
12261402
case AXP803_ID:
@@ -1252,6 +1428,17 @@ static bool axp20x_is_polyphase_slave(struct axp20x_dev *axp20x, int id)
12521428
}
12531429
break;
12541430

1431+
case AXP15060_ID:
1432+
regmap_read(axp20x->regmap, AXP15060_DCDC_MODE_CTRL1, &reg);
1433+
1434+
switch (id) {
1435+
case AXP15060_DCDC3:
1436+
return !!(reg & AXP15060_DCDC23_POLYPHASE_DUAL_MASK);
1437+
case AXP15060_DCDC6:
1438+
return !!(reg & AXP15060_DCDC46_POLYPHASE_DUAL_MASK);
1439+
}
1440+
break;
1441+
12551442
default:
12561443
return false;
12571444
}
@@ -1273,6 +1460,7 @@ static int axp20x_regulator_probe(struct platform_device *pdev)
12731460
u32 workmode;
12741461
const char *dcdc1_name = axp22x_regulators[AXP22X_DCDC1].name;
12751462
const char *dcdc5_name = axp22x_regulators[AXP22X_DCDC5].name;
1463+
const char *aldo1_name = axp15060_regulators[AXP15060_ALDO1].name;
12761464
bool drivevbus = false;
12771465

12781466
switch (axp20x->variant) {
@@ -1312,6 +1500,10 @@ static int axp20x_regulator_probe(struct platform_device *pdev)
13121500
drivevbus = of_property_read_bool(pdev->dev.parent->of_node,
13131501
"x-powers,drive-vbus-en");
13141502
break;
1503+
case AXP15060_ID:
1504+
regulators = axp15060_regulators;
1505+
nregulators = AXP15060_REG_ID_MAX;
1506+
break;
13151507
default:
13161508
dev_err(&pdev->dev, "Unsupported AXP variant: %ld\n",
13171509
axp20x->variant);
@@ -1338,8 +1530,9 @@ static int axp20x_regulator_probe(struct platform_device *pdev)
13381530
continue;
13391531

13401532
/*
1341-
* Regulators DC1SW and DC5LDO are connected internally,
1342-
* so we have to handle their supply names separately.
1533+
* Regulators DC1SW, DC5LDO and RTCLDO on AXP15060 are
1534+
* connected internally, so we have to handle their supply
1535+
* names separately.
13431536
*
13441537
* We always register the regulators in proper sequence,
13451538
* so the supply names are correctly read. See the last
@@ -1348,7 +1541,8 @@ static int axp20x_regulator_probe(struct platform_device *pdev)
13481541
*/
13491542
if ((regulators == axp22x_regulators && i == AXP22X_DC1SW) ||
13501543
(regulators == axp803_regulators && i == AXP803_DC1SW) ||
1351-
(regulators == axp809_regulators && i == AXP809_DC1SW)) {
1544+
(regulators == axp809_regulators && i == AXP809_DC1SW) ||
1545+
(regulators == axp15060_regulators && i == AXP15060_SW)) {
13521546
new_desc = devm_kzalloc(&pdev->dev, sizeof(*desc),
13531547
GFP_KERNEL);
13541548
if (!new_desc)
@@ -1360,7 +1554,8 @@ static int axp20x_regulator_probe(struct platform_device *pdev)
13601554
}
13611555

13621556
if ((regulators == axp22x_regulators && i == AXP22X_DC5LDO) ||
1363-
(regulators == axp809_regulators && i == AXP809_DC5LDO)) {
1557+
(regulators == axp809_regulators && i == AXP809_DC5LDO) ||
1558+
(regulators == axp15060_regulators && i == AXP15060_CPUSLDO)) {
13641559
new_desc = devm_kzalloc(&pdev->dev, sizeof(*desc),
13651560
GFP_KERNEL);
13661561
if (!new_desc)
@@ -1371,6 +1566,18 @@ static int axp20x_regulator_probe(struct platform_device *pdev)
13711566
desc = new_desc;
13721567
}
13731568

1569+
1570+
if (regulators == axp15060_regulators && i == AXP15060_RTC_LDO) {
1571+
new_desc = devm_kzalloc(&pdev->dev, sizeof(*desc),
1572+
GFP_KERNEL);
1573+
if (!new_desc)
1574+
return -ENOMEM;
1575+
1576+
*new_desc = regulators[i];
1577+
new_desc->supply_name = aldo1_name;
1578+
desc = new_desc;
1579+
}
1580+
13741581
rdev = devm_regulator_register(&pdev->dev, desc, &config);
13751582
if (IS_ERR(rdev)) {
13761583
dev_err(&pdev->dev, "Failed to register %s\n",
@@ -1389,19 +1596,26 @@ static int axp20x_regulator_probe(struct platform_device *pdev)
13891596
}
13901597

13911598
/*
1392-
* Save AXP22X DCDC1 / DCDC5 regulator names for later.
1599+
* Save AXP22X DCDC1 / DCDC5 / AXP15060 ALDO1 regulator names for later.
13931600
*/
13941601
if ((regulators == axp22x_regulators && i == AXP22X_DCDC1) ||
1395-
(regulators == axp809_regulators && i == AXP809_DCDC1))
1602+
(regulators == axp809_regulators && i == AXP809_DCDC1) ||
1603+
(regulators == axp15060_regulators && i == AXP15060_DCDC1))
13961604
of_property_read_string(rdev->dev.of_node,
13971605
"regulator-name",
13981606
&dcdc1_name);
13991607

14001608
if ((regulators == axp22x_regulators && i == AXP22X_DCDC5) ||
1401-
(regulators == axp809_regulators && i == AXP809_DCDC5))
1609+
(regulators == axp809_regulators && i == AXP809_DCDC5) ||
1610+
(regulators == axp15060_regulators && i == AXP15060_DCDC5))
14021611
of_property_read_string(rdev->dev.of_node,
14031612
"regulator-name",
14041613
&dcdc5_name);
1614+
1615+
if (regulators == axp15060_regulators && i == AXP15060_ALDO1)
1616+
of_property_read_string(rdev->dev.of_node,
1617+
"regulator-name",
1618+
&aldo1_name);
14051619
}
14061620

14071621
if (drivevbus) {

0 commit comments

Comments
 (0)