mmc: sdhci-of-arasan: Skip setting clock delay for 400KHz

Sai Krishna Potthuri · Ulf Hansson · commit 9fab93895fb6 · 2023-04-17T09:46:53.000+02:00
Clock delay settings are not defined for 400KHz, so add frequency check to skip calling the clock delay settings when frequency is <=400KHz. Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20230403102551.3763054-4-sai.krishna.potthuri@amd.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
@@ -406,7 +406,7 @@ static void sdhci_arasan_set_clock(struct sdhci_host *host, unsigned int clock)
 	}
 
 	/* Set the Input and Output Clock Phase Delays */
-	if (clk_data->set_clk_delays)
+	if (clk_data->set_clk_delays && clock > PHY_CLK_TOO_SLOW_HZ)
 		clk_data->set_clk_delays(host);
 
 	if (sdhci_arasan->internal_phy_reg && clock >= MIN_PHY_CLK_HZ) {

Original file line number	Diff line number	Diff line change
`@@ -406,7 +406,7 @@ static void sdhci_arasan_set_clock(struct sdhci_host *host, unsigned int clock)`
`406`	`406`	`}`
`407`	`407`
`408`	`408`	`/* Set the Input and Output Clock Phase Delays */`
`409`		`- if (clk_data->set_clk_delays)`
	`409`	`+ if (clk_data->set_clk_delays && clock > PHY_CLK_TOO_SLOW_HZ)`
`410`	`410`	`clk_data->set_clk_delays(host);`
`411`	`411`
`412`	`412`	`if (sdhci_arasan->internal_phy_reg && clock >= MIN_PHY_CLK_HZ) {`