@@ -796,18 +796,18 @@ static inline bool context_present(struct context_entry *context)
796796 return (context -> lo & 1 );
797797}
798798
799- extern struct dmar_drhd_unit * dmar_find_matched_drhd_unit (struct pci_dev * dev );
800-
801- extern int dmar_enable_qi (struct intel_iommu * iommu );
802- extern void dmar_disable_qi (struct intel_iommu * iommu );
803- extern int dmar_reenable_qi (struct intel_iommu * iommu );
804- extern void qi_global_iec (struct intel_iommu * iommu );
805-
806- extern void qi_flush_context (struct intel_iommu * iommu , u16 did , u16 sid ,
807- u8 fm , u64 type );
808- extern void qi_flush_iotlb (struct intel_iommu * iommu , u16 did , u64 addr ,
809- unsigned int size_order , u64 type );
810- extern void qi_flush_dev_iotlb (struct intel_iommu * iommu , u16 sid , u16 pfsid ,
799+ struct dmar_drhd_unit * dmar_find_matched_drhd_unit (struct pci_dev * dev );
800+
801+ int dmar_enable_qi (struct intel_iommu * iommu );
802+ void dmar_disable_qi (struct intel_iommu * iommu );
803+ int dmar_reenable_qi (struct intel_iommu * iommu );
804+ void qi_global_iec (struct intel_iommu * iommu );
805+
806+ void qi_flush_context (struct intel_iommu * iommu , u16 did ,
807+ u16 sid , u8 fm , u64 type );
808+ void qi_flush_iotlb (struct intel_iommu * iommu , u16 did , u64 addr ,
809+ unsigned int size_order , u64 type );
810+ void qi_flush_dev_iotlb (struct intel_iommu * iommu , u16 sid , u16 pfsid ,
811811 u16 qdep , u64 addr , unsigned mask );
812812
813813void qi_flush_piotlb (struct intel_iommu * iommu , u16 did , u32 pasid , u64 addr ,
@@ -830,17 +830,17 @@ int qi_submit_sync(struct intel_iommu *iommu, struct qi_desc *desc,
830830 */
831831#define QI_OPT_WAIT_DRAIN BIT(0)
832832
833- extern int dmar_ir_support (void );
833+ int dmar_ir_support (void );
834834
835835void * alloc_pgtable_page (int node , gfp_t gfp );
836836void free_pgtable_page (void * vaddr );
837837void iommu_flush_write_buffer (struct intel_iommu * iommu );
838838struct intel_iommu * device_to_iommu (struct device * dev , u8 * bus , u8 * devfn );
839839
840840#ifdef CONFIG_INTEL_IOMMU_SVM
841- extern void intel_svm_check (struct intel_iommu * iommu );
842- extern int intel_svm_enable_prq (struct intel_iommu * iommu );
843- extern int intel_svm_finish_prq (struct intel_iommu * iommu );
841+ void intel_svm_check (struct intel_iommu * iommu );
842+ int intel_svm_enable_prq (struct intel_iommu * iommu );
843+ int intel_svm_finish_prq (struct intel_iommu * iommu );
844844int intel_svm_page_response (struct device * dev , struct iommu_fault_event * evt ,
845845 struct iommu_page_response * msg );
846846struct iommu_domain * intel_svm_domain_alloc (void );
@@ -887,8 +887,8 @@ extern const struct iommu_ops intel_iommu_ops;
887887
888888#ifdef CONFIG_INTEL_IOMMU
889889extern int intel_iommu_sm ;
890- extern int iommu_calculate_agaw (struct intel_iommu * iommu );
891- extern int iommu_calculate_max_sagaw (struct intel_iommu * iommu );
890+ int iommu_calculate_agaw (struct intel_iommu * iommu );
891+ int iommu_calculate_max_sagaw (struct intel_iommu * iommu );
892892int ecmd_submit_sync (struct intel_iommu * iommu , u8 ecmd , u64 oa , u64 ob );
893893
894894static inline bool ecmd_has_pmu_essential (struct intel_iommu * iommu )
0 commit comments