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177 | 177 | /* Tegra186 and later */ |
178 | 178 | #define WAKE_AOWAKE_CNTRL(x) (0x000 + ((x) << 2)) |
179 | 179 | #define WAKE_AOWAKE_CNTRL_LEVEL (1 << 3) |
| 180 | +#define WAKE_AOWAKE_CNTRL_SR_CAPTURE_EN (1 << 1) |
180 | 181 | #define WAKE_AOWAKE_MASK_W(x) (0x180 + ((x) << 2)) |
181 | 182 | #define WAKE_AOWAKE_MASK_R(x) (0x300 + ((x) << 2)) |
182 | 183 | #define WAKE_AOWAKE_STATUS_W(x) (0x30c + ((x) << 2)) |
|
191 | 192 | #define WAKE_AOWAKE_CTRL 0x4f4 |
192 | 193 | #define WAKE_AOWAKE_CTRL_INTR_POLARITY BIT(0) |
193 | 194 |
|
| 195 | +#define SW_WAKE_ID 83 /* wake83 */ |
| 196 | + |
194 | 197 | /* for secure PMC */ |
195 | 198 | #define TEGRA_SMC_PMC 0xc2fffe00 |
196 | 199 | #define TEGRA_SMC_PMC_READ 0xaa |
@@ -355,6 +358,7 @@ struct tegra_pmc_soc { |
355 | 358 | void (*setup_irq_polarity)(struct tegra_pmc *pmc, |
356 | 359 | struct device_node *np, |
357 | 360 | bool invert); |
| 361 | + void (*set_wake_filters)(struct tegra_pmc *pmc); |
358 | 362 | int (*irq_set_wake)(struct irq_data *data, unsigned int on); |
359 | 363 | int (*irq_set_type)(struct irq_data *data, unsigned int type); |
360 | 364 | int (*powergate_set)(struct tegra_pmc *pmc, unsigned int id, |
@@ -2416,6 +2420,17 @@ static int tegra210_pmc_irq_set_type(struct irq_data *data, unsigned int type) |
2416 | 2420 | return 0; |
2417 | 2421 | } |
2418 | 2422 |
|
| 2423 | +static void tegra186_pmc_set_wake_filters(struct tegra_pmc *pmc) |
| 2424 | +{ |
| 2425 | + u32 value; |
| 2426 | + |
| 2427 | + /* SW Wake (wake83) needs SR_CAPTURE filter to be enabled */ |
| 2428 | + value = readl(pmc->wake + WAKE_AOWAKE_CNTRL(SW_WAKE_ID)); |
| 2429 | + value |= WAKE_AOWAKE_CNTRL_SR_CAPTURE_EN; |
| 2430 | + writel(value, pmc->wake + WAKE_AOWAKE_CNTRL(SW_WAKE_ID)); |
| 2431 | + dev_dbg(pmc->dev, "WAKE_AOWAKE_CNTRL_83 = 0x%x\n", value); |
| 2432 | +} |
| 2433 | + |
2419 | 2434 | static int tegra186_pmc_irq_set_wake(struct irq_data *data, unsigned int on) |
2420 | 2435 | { |
2421 | 2436 | struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data); |
@@ -3042,6 +3057,10 @@ static int tegra_pmc_probe(struct platform_device *pdev) |
3042 | 3057 | platform_set_drvdata(pdev, pmc); |
3043 | 3058 | tegra_pm_init_suspend(); |
3044 | 3059 |
|
| 3060 | + /* Some wakes require specific filter configuration */ |
| 3061 | + if (pmc->soc->set_wake_filters) |
| 3062 | + pmc->soc->set_wake_filters(pmc); |
| 3063 | + |
3045 | 3064 | return 0; |
3046 | 3065 |
|
3047 | 3066 | cleanup_powergates: |
@@ -3938,6 +3957,7 @@ static const struct tegra_pmc_soc tegra186_pmc_soc = { |
3938 | 3957 | .regs = &tegra186_pmc_regs, |
3939 | 3958 | .init = tegra186_pmc_init, |
3940 | 3959 | .setup_irq_polarity = tegra186_pmc_setup_irq_polarity, |
| 3960 | + .set_wake_filters = tegra186_pmc_set_wake_filters, |
3941 | 3961 | .irq_set_wake = tegra186_pmc_irq_set_wake, |
3942 | 3962 | .irq_set_type = tegra186_pmc_irq_set_type, |
3943 | 3963 | .reset_sources = tegra186_reset_sources, |
@@ -4122,6 +4142,7 @@ static const struct tegra_pmc_soc tegra194_pmc_soc = { |
4122 | 4142 | .regs = &tegra194_pmc_regs, |
4123 | 4143 | .init = tegra186_pmc_init, |
4124 | 4144 | .setup_irq_polarity = tegra186_pmc_setup_irq_polarity, |
| 4145 | + .set_wake_filters = tegra186_pmc_set_wake_filters, |
4125 | 4146 | .irq_set_wake = tegra186_pmc_irq_set_wake, |
4126 | 4147 | .irq_set_type = tegra186_pmc_irq_set_type, |
4127 | 4148 | .reset_sources = tegra194_reset_sources, |
@@ -4249,6 +4270,7 @@ static const struct tegra_pmc_soc tegra234_pmc_soc = { |
4249 | 4270 | .regs = &tegra234_pmc_regs, |
4250 | 4271 | .init = tegra186_pmc_init, |
4251 | 4272 | .setup_irq_polarity = tegra186_pmc_setup_irq_polarity, |
| 4273 | + .set_wake_filters = tegra186_pmc_set_wake_filters, |
4252 | 4274 | .irq_set_wake = tegra186_pmc_irq_set_wake, |
4253 | 4275 | .irq_set_type = tegra186_pmc_irq_set_type, |
4254 | 4276 | .reset_sources = tegra234_reset_sources, |
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