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FaboUlf Hansson
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dt-bindings: power: Add MT8365 power domains
Add power domains dt-bindings for MT8365. Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Tested-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20230918093751.1188668-2-msp@baylibre.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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Documentation/devicetree/bindings/power/mediatek,power-controller.yaml

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@@ -31,6 +31,7 @@ properties:
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- mediatek,mt8188-power-controller
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- mediatek,mt8192-power-controller
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- mediatek,mt8195-power-controller
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- mediatek,mt8365-power-controller
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'#power-domain-cells':
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const: 1
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"include/dt-bindings/power/mediatek,mt8188-power.h" - for MT8188 type power domain.
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"include/dt-bindings/power/mt8192-power.h" - for MT8192 type power domain.
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"include/dt-bindings/power/mt8195-power.h" - for MT8195 type power domain.
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"include/dt-bindings/power/mediatek,mt8365-power.h" - for MT8365 type power domain.
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maxItems: 1
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clocks:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: phandle to the device containing the INFRACFG register range.
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mediatek,infracfg-nao:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: phandle to the device containing the INFRACFG-NAO register range.
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mediatek,smi:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: phandle to the device containing the SMI register range.
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/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
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/*
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* Copyright (c) 2022 MediaTek Inc.
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*/
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#ifndef _DT_BINDINGS_POWER_MT8365_POWER_H
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#define _DT_BINDINGS_POWER_MT8365_POWER_H
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#define MT8365_POWER_DOMAIN_MM 0
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#define MT8365_POWER_DOMAIN_CONN 1
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#define MT8365_POWER_DOMAIN_MFG 2
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#define MT8365_POWER_DOMAIN_AUDIO 3
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#define MT8365_POWER_DOMAIN_CAM 4
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#define MT8365_POWER_DOMAIN_DSP 5
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#define MT8365_POWER_DOMAIN_VDEC 6
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#define MT8365_POWER_DOMAIN_VENC 7
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#define MT8365_POWER_DOMAIN_APU 8
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#endif /* _DT_BINDINGS_POWER_MT8365_POWER_H */

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