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drm/i915/ddi: Add a helper to enable a port
Add a helper to enable a port instead of open-coding it. While at it rename intel_disable_ddi_buf() to intel_ddi_buf_disable() for consistency. v2: (Jani) - s/intel_enable_ddi_buf/intel_ddi_buf_enable - s/intel_disable_ddi_buf/intel_ddi_buf_disable Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250214142001.552916-11-imre.deak@intel.com
1 parent 99037db commit a235928

1 file changed

Lines changed: 19 additions & 21 deletions

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drivers/gpu/drm/i915/display/intel_ddi.c

Lines changed: 19 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -3072,7 +3072,18 @@ mtl_ddi_disable_d2d(struct intel_encoder *encoder)
30723072
port_name(port));
30733073
}
30743074

3075-
static void intel_disable_ddi_buf(struct intel_encoder *encoder,
3075+
static void intel_ddi_buf_enable(struct intel_encoder *encoder, u32 buf_ctl)
3076+
{
3077+
struct intel_display *display = to_intel_display(encoder);
3078+
enum port port = encoder->port;
3079+
3080+
intel_de_write(display, DDI_BUF_CTL(port), buf_ctl | DDI_BUF_CTL_ENABLE);
3081+
intel_de_posting_read(display, DDI_BUF_CTL(port));
3082+
3083+
intel_wait_ddi_buf_active(encoder);
3084+
}
3085+
3086+
static void intel_ddi_buf_disable(struct intel_encoder *encoder,
30763087
const struct intel_crtc_state *crtc_state)
30773088
{
30783089
struct intel_display *display = to_intel_display(encoder);
@@ -3136,7 +3147,7 @@ static void intel_ddi_post_disable_dp(struct intel_atomic_state *state,
31363147
intel_ddi_disable_transcoder_clock(old_crtc_state);
31373148
}
31383149

3139-
intel_disable_ddi_buf(encoder, old_crtc_state);
3150+
intel_ddi_buf_disable(encoder, old_crtc_state);
31403151

31413152
intel_dp_sink_set_fec_ready(intel_dp, old_crtc_state, false);
31423153

@@ -3185,7 +3196,7 @@ static void intel_ddi_post_disable_hdmi(struct intel_atomic_state *state,
31853196
if (DISPLAY_VER(dev_priv) < 12)
31863197
intel_ddi_disable_transcoder_clock(old_crtc_state);
31873198

3188-
intel_disable_ddi_buf(encoder, old_crtc_state);
3199+
intel_ddi_buf_disable(encoder, old_crtc_state);
31893200

31903201
if (DISPLAY_VER(dev_priv) >= 12)
31913202
intel_ddi_disable_transcoder_clock(old_crtc_state);
@@ -3392,7 +3403,7 @@ static void intel_ddi_enable_hdmi(struct intel_atomic_state *state,
33923403
struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
33933404
struct drm_connector *connector = conn_state->connector;
33943405
enum port port = encoder->port;
3395-
u32 buf_ctl;
3406+
u32 buf_ctl = 0;
33963407

33973408
if (!intel_hdmi_handle_sink_scrambling(encoder, connector,
33983409
crtc_state->hdmi_high_tmds_clock_ratio,
@@ -3457,8 +3468,6 @@ static void intel_ddi_enable_hdmi(struct intel_atomic_state *state,
34573468
* is filled with lane count, already set in the crtc_state.
34583469
* The same is required to be filled in PORT_BUF_CTL for C10/20 Phy.
34593470
*/
3460-
buf_ctl = DDI_BUF_CTL_ENABLE;
3461-
34623471
if (dig_port->lane_reversal)
34633472
buf_ctl |= DDI_BUF_PORT_REVERSAL;
34643473
if (dig_port->ddi_a_4_lanes)
@@ -3484,9 +3493,7 @@ static void intel_ddi_enable_hdmi(struct intel_atomic_state *state,
34843493
buf_ctl |= DDI_BUF_CTL_TC_PHY_OWNERSHIP;
34853494
}
34863495

3487-
intel_de_write(dev_priv, DDI_BUF_CTL(port), buf_ctl);
3488-
3489-
intel_wait_ddi_buf_active(encoder);
3496+
intel_ddi_buf_enable(encoder, buf_ctl);
34903497
}
34913498

34923499
static void intel_ddi_enable(struct intel_atomic_state *state,
@@ -3710,7 +3717,6 @@ static void mtl_ddi_prepare_link_retrain(struct intel_dp *intel_dp,
37103717
struct intel_display *display = to_intel_display(crtc_state);
37113718
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
37123719
struct intel_encoder *encoder = &dig_port->base;
3713-
enum port port = encoder->port;
37143720
u32 dp_tp_ctl;
37153721

37163722
/*
@@ -3744,15 +3750,11 @@ static void mtl_ddi_prepare_link_retrain(struct intel_dp *intel_dp,
37443750
mtl_port_buf_ctl_program(encoder, crtc_state);
37453751

37463752
/* 6.i Configure and enable DDI_CTL_DE to start sending valid data to port slice */
3747-
intel_dp->DP |= DDI_BUF_CTL_ENABLE;
37483753
if (DISPLAY_VER(display) >= 20)
37493754
intel_dp->DP |= XE2LPD_DDI_BUF_D2D_LINK_ENABLE;
37503755

3751-
intel_de_write(display, DDI_BUF_CTL(port), intel_dp->DP);
3752-
intel_de_posting_read(display, DDI_BUF_CTL(port));
3753-
3754-
/* 6.j Poll for PORT_BUF_CTL Idle Status == 0, timeout after 100 us */
3755-
intel_wait_ddi_buf_active(encoder);
3756+
intel_ddi_buf_enable(encoder, intel_dp->DP);
3757+
intel_dp->DP |= DDI_BUF_CTL_ENABLE;
37563758
}
37573759

37583760
static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp,
@@ -3762,7 +3764,6 @@ static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp,
37623764
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
37633765
struct intel_encoder *encoder = &dig_port->base;
37643766
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
3765-
enum port port = encoder->port;
37663767
u32 dp_tp_ctl;
37673768

37683769
dp_tp_ctl = intel_de_read(dev_priv, dp_tp_ctl_reg(encoder, crtc_state));
@@ -3785,11 +3786,8 @@ static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp,
37853786
(intel_tc_port_in_dp_alt_mode(dig_port) || intel_tc_port_in_legacy_mode(dig_port)))
37863787
adlp_tbt_to_dp_alt_switch_wa(encoder);
37873788

3789+
intel_ddi_buf_enable(encoder, intel_dp->DP);
37883790
intel_dp->DP |= DDI_BUF_CTL_ENABLE;
3789-
intel_de_write(dev_priv, DDI_BUF_CTL(port), intel_dp->DP);
3790-
intel_de_posting_read(dev_priv, DDI_BUF_CTL(port));
3791-
3792-
intel_wait_ddi_buf_active(encoder);
37933791
}
37943792

37953793
static void intel_ddi_set_link_train(struct intel_dp *intel_dp,

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